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Showing content with the highest reputation on 07/30/21 in all areas

  1. No, it does not have to be. Firstly I'll explain the prefetch architecture, then a read to precharge scenario with a single burst. Many DDR memory systems use prefetching technology to reduce the internal memory clock while still allowing for high transfer rates. The prefetch architecture uses an internal memory bus that is wider than the I/O bus by however many times the prefetch architecture used is. On DDR3 and DDR4 and 8n prefetch architecture is used, this means that internal memory bus is 8 times wider than the external I/O bus. The prefetch architecture works by having the data stored transferred from the internal core memory into prefetch buffers for reads and the data transferred from the prefetch buffers to the internal memory for reads. It takes a single internal memory clock cycle to transfer this data both ways, meaning that when the read command is addressed, after 4 I/O bus clock cycles the data will be in the prefetch buffers, and ready to transfer. Due to this having a CAS latency below 4 on DDR3 is not possible. This means that the DRAM is free to be precharged just 4 clock cycles after the read command is addressed, even though the burst has not occurred yet. Now I'll explain a single read burst to a precharge. This is a diagram of a read to precharge scenario I made my that applies to both DDR4 and DDR3 memory systems. This is a hypothetical situation where CL = 16, tRCD = 16, tRP = 16 and tRTP = 4, these timings are all legal and viable. So in this scenario the memory is firstly activated, which opens the row that is going to be read from, then tRCD clock cycles later, the read command is addressed which chooses the column to read from, and then starts the internal data transfer from the internal memory to the prefetch buffer. As DDR3 is 8n, the internal memory bus is 8 times wider, and as DDR3 is well DDR, the internal memory clock is 4 times slower then the physical I/O bus clock. This means that the data is transferred to the external prefetch buffer just 4 I/O clock cycles after. This means after this point, the memory can be precharged when ever. When the read command is addressed you can then see tRTP is the read to precharge delay, whilst CL is the delay to the start of the burst, both commands starting simultaneously but not caring about the other. tRP is then the recovery from the precharge to when the memory can be activated or refreshed again. So the min value for tRTP is just 4, not (CL+BL) - tRP, CL and BL don't even need to be accounted for since they go down a different path, and tRP happens when tRTP is expired. I hope this helps, I'm happy to answer any other questions you might have
    2 points
  2. https://www.3dmark.com/3dm/64277564 Soc 1266 and Flck 2177 Made 2380 FT2 memory possible. The new more Powertool had some realy nice functions
    2 points
  3. Woah. Nice stuff bro. TS the only bench that Crossfire working with?
    1 point
  4. I set tras 18 in bios and boot up @100 up to 103 bclk
    1 point
  5. have to agree with chrispy. only change to my last benchmark and the one i ran just a few minutes ago is the the new driver. I was pretty reluctant but Im happy with this one. im going to read up a little bit more. just waiting on documentation from XFX because apparently aside of the scu numbers there is a huge difference between the two XFX black editions. i ll link the two. has to do with one having more efficient vrms and being able to hold a higher voltage.. https://www.3dmark.com/3dm/64342155? holy shit i stand corrected. there are now 3 black edition variants. just did a quick copy paste edit. my contact at xfx kinda leaked but he didnt lol. no officially at least. he said the limited black editions were originally supposed to come watercooled but their was a backorder on the gpu waterblock plates and those went to the asus cards instead.(all speculation tho) maybe i can get some help if some of you on here have the other two. i have the limited black edition. need some simple benchmarks and numbers on the other two. just so i can put together a proper review of sorts. thats the update tho.
    1 point
  6. You definitely need to move in country with ln2 availability
    1 point
  7. Seems like Gorod was right saying that PCIE may influence the clocks on nv43 (http://www.xtremesystems.org/forums/showthread.php?248552-6600GT-834MHz-gt-03-05-06-WR&p=4321051&viewfull=1#post4321051) - I did a quick test myself dropping bclk with 2500K from 104 to 100 and card lost stability. Probably nv43 needs a combo of temperature, voltage and pcie clock to show good gains. For me, going cold gained at least 100MHz.
    1 point
  8. Thank you for sharing your findings @L!ME , awesome findings. Appreciate it !
    1 point
  9. Finally an awesome performance driver 21.7.2 from amd driver dev team. Now the rx 6900xt gpus on air and water are beating rtx 3090s on LN2 in Timespy lol 🤣 , just amazing what good drivers can do , hugeee performance unlocked on amd cards ... Need to re-bench asap ... going to try crossfire X 2 6900xtxh ⚡ to see if i can beat my own rtx 3090 x2 sli on Timespy ...
    1 point
  10. https://drive.google.com/file/d/1BvruGhGEHNlD0KmKmr2fgeFr2Q_-pheJ/view?usp=sharing here is link from Gdrive
    1 point
  11. Look at stable's cfg. I can 4900 19-19 1T 1.576V for stable, lol. It not ratio problem. I think so tight rtl on cl 14 for IMC
    1 point
  12. I'm pretty sure these are for the UT 790FX M2R let me know if you need any or all of them:
    1 point
  13. Got LN2 and decided to run some cold mem. BBSE was a bit disappointing but the sticks only just do 2600C8 on air. Full pot & 2.1V: Ran my trusty 1600C7 again and finally got into the 17s. Full pot & 2.36V:
    1 point
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