Amd_ocer
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Posts posted by Amd_ocer
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Well maybe Asus should clarify their voltage expected range with each of their LLC levels, so we dont have to do all this guessing and manual checking work? Ya they should, and that is the root problem, not me trying to get the info I need... Speculation based on lack of info from manuf is Normal.
Measuring at socket with a dmm should not be a requirement for 95% of users, unless you are doing hardcore OCing or require some crazy accuracy, which is again, not the case for 95% of users. Otherwise, it is AMD and the motherboard manuf that should tell software engineers how to accurately find and display all these necessary voltages. It is not rocket science, nor should it be the way it is today. You are lucky you are not dealing with hundreds of amps and hundreds of volts otherwise you would be thinking very hard b4 suggesting to use a dmm. Just saying...
Ya let me open my case and measure with a dmm every time I need a vcore or SOC reading... far from practical or ideal.. Assuming nothing get shorted....thats what I call silly
I been using dmm for over 10 years, for all kind of applications, but this is NOT where I wanna use a dmm while OCing or getting some simple voltages on a $300+ board and a $400+ CPU..
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Common, even at LLC5 it is going slightly above what set in bios. It's not like going to 1.8V when 1.4V is set.
I don't see what danger you're talking about.
Also, what voltage limit on each LLC? You can measure it under socket for actual voltage.
That depends greatly on each MB, I have seen ugly voltage overshooting with LLC being used under load on many boards. Maybe not the Crosshair, I cannot confirm until I get one.
I will try to find the measurement points for the DMM once I get CPU / MB...
Does Asus even mention what is the voltage variance between each LLC level used? Meaning if it is set at 1.40 in BIOS, what is the range of voltage it would vary between each LLC level used?
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You worry too much, auto works fine so does LLC 3 you just need to set V_Core to accommodate your needs. Auto will have a larger droop under load. I never had issue with that until I pushed harder and the droop started to increase. Then I raised it to LLC 3 which kept load voltage ~ .025V lower than BIOS setting under load.
I am actually not worried about vdroop: at worst your stress test will fail, at best you save your CPU.
I am worried about LLC allowing the CPU to go much higher than the idle set limit in BIOS when CPU is under load. At best it should keep it within that limit, not go OVER it...
What MB manuf should do is have 2 vcore voltages: one for idle, and another for load, so CPU will bounce between these two values depending on load. LLC can cause dangerous results especially that we dont know exactly what is the voltage limit for each LLC level, Auto included... It does not help when majority of software are not measuring correctly, so what you see is not what you get
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To be more specific as far as LLC, should we try to keep the vcore idle voltage to be THE SAME under load or should it be MORE than the idle vcore (with the help of LLC)..?
My understanding is that the higher LLC we choose, the higher voltage overshooting will happen when CPU is under load, which means more potential damage to the CPU, or am I understanding this wrong? I thought the whole point of LLC is to prevent the CPU from going under what is set in the BIOS (cdroop), but it seems LLC is actually allowing the vcore to be MORE than what it is set in BIOS. Can someone clarify all this as far as the CH6 goes?
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If you follow the link in my previous post you see this statement from elmor:
Because of that statement I rely most on SVI2 TFN-reading from HWInfo64. This value slightly drops when I start to stress my cpu - like it should when using llc 3. Additionally this value is roughly the same like vcore bios setting when cpu is in idle.
Yes, it's working fine for now. And I'm happy with it because now I have the same PCIe-bandwidth like 2x x10 3.0. Better than 2x x8 3.0 and totally worth it.
From what I read around, we WANT the CPU to lower its voltage under stress in order to compensate for the higher current when its under load, otherwise there is higher risk for damaging the CPU with too much voltage.
That said, I have to research more to leave the LLC at auto, or to put it to something reasonable for daily usage, like Level 2 or 3.
Can anyone comment on their recommendations for LLC for a Ryzen 7 chip to reach something like 3.8 to 3.9 (I dont plan to go further than that)?
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This was already discussed earlier in this thread. Dmm-reading while loaded isn't accurate. I haven't measured idle, though.
For sure crashes during P95-load occur due to low vcore. But I don't want to use llc4 or 5 for daily operation so the only conclusion would be to raise vcore. Will do that later on when the may-update is there so I (hopefully) can adjust memory timings. Then I plan to find a fully primestable setting. For now half an hour for different FFT-lengths is enough for me.
That was no advise. It's the way PCIe on Ryzen works. ASUS found a way to force 3.0 (or 2.0 later on when Ryzen switches to 1.1) on higher PCIe-frequencies so this setting is very welcome to widen my bottleneck.
Better have something you don't need than need something you don't have. Therefore I always have more memory installed than I really need.
This memory kit was a good deal with websmile and I enjoy it every day. I don't really need this amount but it gives me a good feeling to know that there is no bottleneck in my system.For my 24/7-system I wouldn't feel comfortable with 32 gb - let alone 16 gb.
Well I gotta read 10,000 posts there to see if there is any software solution that monitors vcore accurately.
If you get a chance to measure idle with a DMM please let me know. I wonder if BIOS is still inaccurate. Otherwise, how are we to set vcore for idle and LLC in BIOS if all these numbers are not true to begin with... its all a mess.
Ahh good to know, I would much rather leave it at GEN3 with 125 BCLK then. Glad to hear it is working fine.
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It depends on the way you read the vcore.
- CPU-Z: 1.308v
- HWInfo SVI2 TFN: lowest reading is 1.286v, most of the time while P95-load it is 1.294v
- dmm: 1.399v
Because I don't want full llc. I want to have a slightly lower voltage under load than in idle.
Is there a reason why I should want them to set for GEN2?
GEN2 would cut PCIe-bandwidth in half compared to GEN3. Running 2x 1080TI I already have bottlenecks in gaming even at 100 mhz GEN3. Additional 25 mhz more pcie-clock help to widen the bottleneck while gaming. Going down to GEN2 would make this bottleneck even worse.
So since this is my daily gaming-rig I don't really understand your intention. Sorry.
Sorry to sound a bit rude but when I want to run 64 gb in my daily rig then I simply do it. I know that I could hit higher numbers with less memory but again: I don't want to break records with this setup, it's intended to game with.
I am running Battlefield 4 in 3840x2160 and 125 % resolution scale (that means 4800x2700 effectivly, 56 % more pixels than 3840x2160) with about 130 to 160 fps (only some drops below 100 fps). This setup doesn't care about SuperPI, Geekbench or similar tests. It's all about best possible daily gaming-performance with Ryzen. And I think I succeeded.
I am very pleased with this setup and the fact that I can run 64 gb at 3000 with c14. I never expected such memory clock with my TridentZ-kit.
So let's go with the dmm, 1.399v under load.. that means the set voltage under BIOS for 1.3250 is not accurate if we measure it with the the dmm. Could you please measure the vcore on idle with a dmm?? Just want to know the actual diff between the two when measured with a dmm.
Are you sure the tests are not crashing because of vcore dropping more than it should when LLC is at level 3? Just a question, not trying to give you hard time lol
For the BCLK, I read that it was advised to lower to GEN2 when OCing the BCLK from 100 to 105-144.. did I misread that??
It makes perfect sense to leave the 1080ti on GEN 3 for that huge bandwidth you have, am just lost how it would still work when we OCed the BCLK to 125.
For the 64GB, I was actually praising your setup, not criticizing it, dont take all my comments too personally
It is the reason why I will go for 2x16GB for now, in case I would need to add 64gb in the future! -
Here are my current settings with bios 1001:
There is one drawback though. If you shut down the psu or pull the plug, the system does start three times till the final post occurs. On - off - on - off - on.
Additionally I have to say that these settings aren't very stable. I can run Prime95 29.10 FM3 for about 30 Minutes (18k, 1344k and 800k tested) but longer runs result in a shutdown. But it's enough to fullfill my needs for a gaming rig (I did not have a single crash since running these settings).
Thanks.
Couple questions/suggestions:
- What is the actual vcore under load (prime for example)?
- Any reason you chose Load Line Cal. at Level 3 and not 4 or 5? It might give you more stability under stress tests, maybe worth a try.
- Any reason the PCIex16 and x8 are left to GEN 3, I would assume at 125 BCLK you would want them set for GEN2?
- You are running 64GB otherwise you could have got much better frequency and timing with the type of RAM you have. Still 64GB with 14 timing and 3000 is excellent!
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I am running 125 with my 24/7-rig without a single hiccup. m.2 and 1080 ti-sli running fine with fixed 3.0 in bios. Only the link between cpu and promontory is down to 2.0.
This is the setup I was aiming for.
Can you post your exact BIOS settings in terms of the memory, PCIe, and so on please?
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Quick question, sorry if it has been adressed, I've tried google but havent found the answer. I am currently running my 1700 at 4018 mhz stable with tridentz 3200 ram at 114bclk 3343 mhz with 12 12 12 12 26 timings is a bclk of 114 ok for a daily driver or do i need to go back to 100 bclk for daily use?
Sent from my SM-N920V using Tapatalk
From what I read around, under 115-120 is just fine for daily, and it will keep your PCI under GEN2 which is fine even for cards like the gtx 1080ti
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Currently, we don't have control over any memory timings, except the main 5.
AMD's AGESA code provides "tables" with different sets of timings depending on the divider used.
Whenever you use e.g. 2666 divider, you always get the same set of timings and you can only change main 5 in bios - all other subtimings are what AMD thought suitable.
Higher divider - slacker timings - higher latency. If you want the best possible results, you have to increase bclk and use lower divider (with tighter subtimings).
There's another thing. I have tried 4x8 single rank Samsung B-die and it is impossible to boot at anything lower than CAS18 on 3200 divider, so if I want to run 3200C14 with four sticks and decent timings, I have to use lower divider in combination with bclk. There's something wrong with higher dividers. Same thing applies to 2x16 dual rank, I think, but have no such sticks to verify. 3200 with CAS lower than 18 basically only works with 1 sngle rank dimm per channel (2x8/2x4).
Many people with high density kits have problems booting with higher dividers at all, so this is another reason to use lower dividers.
PCI-E drops to GEN2, but I don't think this is a big issue even for 24/7. For benching you can go much higher in bclk, but for 24/7 it is not really recommended.
Got it. So it is mainly because the current 3200 divider is not working as expected, otherwise we would not theoretically need to go 2666 in order to have better mem frequency or latency. So maybe in the future that would be fixed by BIOS updates and we would not have to go to a lower mem divider, OR raise the BCLK. Now it all makes sense.
Lastly, are the memory latency issues with having 2 CCXs been addressed yet? I use a lot of VMs and I would like to know how Ryzen fairs in terms of fast memory transfer between its own CCXs and the main memory...
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Here is another example: why would someone with the following kit F4-3200C14D-32GTZSW use a BCLK of 131.4 and a divider of 2133, just to reach a DDR4 frequency of 2803, when his kit supports the 3200 divider in the first place..
Lastly, I read that when increasing the BCLK on the CH6 board it would automatically downgrade the PCIe to GEN 2, is that true, or it would have to be manually changed?
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What I dont understand is the calculation of the mem divider vs the memory frequency on Ryzen. For example, if I have a kit that is 3200CL14 or CL15 and my target DRAM is also 3200CL14, and the board supports a divider of 3200, why would I mess with the BCLK at that point?
In which case one would lower the divider to 2666 from 3200 on a 3200CL14 or 3200CL15 kit, and for what purposes?
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^^ In your example, what is the "stock" DDR specs and speeds?
Would not raising BCLK to 140 causes everything else to be affected, like PCI devices, and so on... Seems like counter-productive at that point.
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hi guys,
So I read and went through the C6H XOC Guide v05 entire guide and I have some questions.
The stock BCLK is of course 100 (which applies to mem, CPU , etc)
My question is: what is the advantage (if any) to increase that BCLK to 114, or 116, or 120 when it comes to memory overclocking..? I mean we have 100 BCLK that can work with DDR4 2400 all the way to DDR4 3600, so can someone please explain to me why would we want to increase the BCLK?
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Well, that's the AMD "optimization", I guess Most important is the chip - B-die.
Both kits I have (old 3600C17 and 3733C17) work without a problem on Ryzen. I even tested for stability 4x8GB at 3200 14-14-14-34 1T (trying to mimic that G.Skill screenshot from some time ago) at 1.35V. Also managed 3800+ at C12 bench "stable".
But I guess it is good for people who just plug and play. It will offer a little better performance compared to 2133 JEDEC.
And, this FlareX doesn't seem too bad, considering many recent high bins fail on the same test. It could be much worse, plus voltage tolerance is higher than expected.
Was the 4x8gb 3200 C14 achieved with 4x8gb 3600C17 or a mix of the 3600 and 3733 kits? Please provide us with more details
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Well, that's the AMD "optimization", I guess Most important is the chip - B-die.
Both kits I have (old 3600C17 and 3733C17) work without a problem on Ryzen. I even tested for stability 4x8GB at 3200 14-14-14-34 1T (trying to mimic that G.Skill screenshot from some time ago) at 1.35V. Also managed 3800+ at C12 bench "stable".
But I guess it is good for people who just plug and play. It will offer a little better performance compared to 2133 JEDEC.
And, this FlareX doesn't seem too bad, considering many recent high bins fail on the same test. It could be much worse, plus voltage tolerance is higher than expected.
I just want to make sure, did you get the 3200 at 14 timing through 4x8gb even with the 3600 CL17 kit?? Can I achieve those numbers with a 2x2x8gb kit running at 3600C17?
Thanks for confirming
ROG Crosshair VI
in Ryzen | Bristol Ridge AM4
Posted
Best post with the most useful info right there. Thanks!