Search the Community
Showing results for tags 'crosshair viii'.
BIOS UPDATE 2021/9/7 UPDATE ROG CROSSHAIR VIII Series 3801 BETA BIOS 1. Improve system performance 2. Update AGESA version to ComboV2PI 1203 PatchC (before bios Same Ver) ROG CROSSHAIR VIII HERO BETA BIOS 3801 ROG CROSSHAIR VIII HERO WIFI BETA BIOS 3801 ROG CROSSHAIR VIII FORMULA BETA BIOS 3801 ROG CROSSHAIR VIII IMPACT BETA BIOS 3801 ROG CROSSHAIR VIII DARK HERO BETA BIOS 3801 ROG CROSSHAIR VIII EXTREME BETA BIOS 0055 FOR XOC 3001 BIOS (Some CPUs have better XOC in old bios, so need to test it) HERO : https://drive.google.com/file/d/19phgI9Uqw1dyly0svQEGAsz05Y6uhpxX/view?usp=sharing HERO WIFI : https://drive.google.com/file/d/1IB78aBuTMM3oyhThv1q3DGNa56xhF1Ga/view?usp=sharing FORMULA : https://drive.google.com/file/d/1fJLp-XpeShG72o-QNywLjH4vNo6vM9wH/view?usp=sharing IMPACT : https://drive.google.com/file/d/1DBP_QdaNfCtjFDdImicZYRUxn6gwB5l3/view?usp=sharing DARK HERO : https://drive.google.com/file/d/1j3N0deJg94ZTbEYVMq9biIpZMW2rHRNx/view?usp=sharing NEW OC PACK TURBOV : https://drive.google.com/file/d/1Kkf430LfxOE22lykbp62N7yzF7XPOmcC/view?usp=sharing OCTOOL : https://drive.google.com/file/d/1rUROnjW53ZD80IhaONVk3bl7hsUdv0zV/view?usp=sharing tRFC / tRFC2 / tRFC4 now max value can do 1023. LN2 jumper enabled, FCLK = 1566, VDDG CCD = 1.2V, VDDG IOD = 0.9V. LN2 jumper enabled DRAM voltage = 1.65V. USB Flashback LN2 OC TIP There is an FCLK cold bug under LN2 so try to stay around 1400~1600 for FCLK under LN2 to get a good compromise between temps and perf. To improve stability in this case: VDDG 1.15v, SOC 1.28v, disable DF Cstates. Depending on the CPU and FCLK, may have to control temps -120C ~ -170C. I typically use 1.35v ~ 1.55v SOC just to get as high an FCLK/Cold bug margin as possible. Do not be alarmed when it resets when temperature changes, pcie and fclk needs to retrain when temps change. Also sometimes there is temperature hole so going lower than it hangs may help. FCLK Biggest problem on the platform 1200 default freq and supposed to go 1:1 with memory for best latency. Improves performance but limited, ~ 1800+ on air and 1400 on LN2. FCLK instability includes hang at postcodes such as ‘07’, stuttering in OS, drop performance in Cinebench. CPU has FCLK cold bug. Improve FCLK Margin by using 1.15VDDG (too much will hang) and 1.3+v SOC. Since VDDG is sourced from SOC so SOC should be higher. VDDG only takes effect at 1400+ FCLK so under LN2 you need to set 1400. Higher usually fails during LN2. Enable LN2 mode, Use the Load LN2 profile as a base template, this uses low vcore so you can save exit when it’s not cold. You will need to do this before -40C to avoid cold bug. You need 1400 FCLK + 1.15v VDDG and 1.35~1.45VSOC. Post codes 07 : too high fabric / fabric unstable (can press reset 2~3 try but If not solved You need to reset the flck clock after lowering the temperature to -120c.) F9 or 23 : High Memory Clock / Tight Timings (Memory reset need) other code : (can press reset 2~3 try but If not solved You need to lower the temperature to 100c ~ 120c.) About AMD Limitations Safemode cannot restore back to stock memory settings as this takes place in the ‘PSP’ which the BIOS has no control over at that point of time. Either you have to clear cmos or wait for 5 times of post code ‘F9’ to get into AMD’s recovery mode. AMD’s recovery mode restores every AMD option back to stock, including timings and CLDO voltages. Because of the above, try not to clear cmos during LN2, at most go safe mode if your settings can be sustained with 1.5v DRAM, since BIOS will apply 1.5v for safemode when LN2 enable. IF you clear cmos, FCLK will go back to Auto and CLDO VDDG voltage will too. When cold, FCLK needs to be 1400+ and VDDG 1.15v if not Fabric will be unstable so you need to torch up to maybe -60c in this case. Therefore test your Memory settings on ambient first. Cold CPU improves Memory OC so you don’t need to worry about MC cold bug. TRY NOT TO CLEAR CMOS WHEN CPU IS COLD Enjoy!