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It's high time get more familiar with the newest Intel HEDT platform - LGA 2066 and X299 chipset. To be honest I hoped that some other overclockers, who were benching ROG X299 platform more often than I was able to or got access to more models of CPUs than I had, would share their extra knowledge so I could learn something extra to avoid rookie mistakes, but it's already 3 months from the launch and meanwhile I learned some tricks. Maybe they will learn something from me instead :)


Rampage VI Apex


The hero of this guide is Asus Rampage VI Apex edition motherboard which continues legacy of Apex line originating from Z270. Looks like from now on the highest model even in HEDT segment in naming/pricing is no longer the best option for LN2. Please remember that Rampage VI Extreme has only 8PIN EPS + 4PIN in contradiction to Rampage VI Apex (2x 8PIN EPS) and Extreme version doesn't support Kabylake-X CPUs, it means that some components from VRM are removed. Moreover Extreme has 8 DIMM design which is less effective for high memory overclocking. The main difference between SKLX and KBLX CPUs in terms of power design is of course FIVR, which motherboard vendors love and XOC community hates. Why there are two totally different points of view? It dates back to LGA 1150 times, vendors claimed from their point of view FIVR is great - easier to design a board, cheaper to produce and lower RMA rates cause FIVR doesn't stress VRM that much. Extreme overclockers hate it cause of two major things: ColdBootBug and ColdBug. I say it's life, we just have to adapt to less easy-going benching. So this time we have CB/CBB free KBLX CPUs and CB/CBB crippled SKLX CPUs on the same platform. In my honest opinion, in those times, sadly I have to say ColdBug is the only thing which might save XOC for a bit longer - eliminates Liquid Helium from the picture of rankings, which slowly is killing XOC for mainstream sockets and what is more important, is just the epic waste of rare resources of Mother Earth for a such simple hobby as XOC :) Sadly HWBOT or Intel are deaf for XOC ocers requests just to create separate LHE ranking not affecting point system.










Sadly despite the current pricing policy, we won't find any useful accessories like OC Panel or even OC Socket! The more expensive boards are, the more RGB LEDs are soldered on the board, the less we are getting in terms of accessories :)The only extra OC tools are DMI pins posted below which will be analysed in the next chapter.








XA edition board, when I retire and quit XOC it might be worth a small fortune :D




Legendary fixed (added fins) VRM Heatsink for which board was delayed in production for a few weeks. Good that final product works.




Code poster with LN2 mode and Slow Mode, Pause switches, RSVD1 and RSVD2 for KBLX CBB options. We have also 4 dip switch for PCIE slots. We can also see voltage measurement points which are sometimes very useful.


Sadly there are no memory DIMM channel dip switches, which were available in early ES boards. In some case pretty useful feature, but well we can live without it.








CPU VRM looks strong - real 8 phase IOR Driver MOSFET






Under the back of the board, after removing heatsinks we have POS capacitors filtering and stabilizing voltage and capacitors which close signals for IOR Driver MOSFETs.




Board looks like typical Apex-like ROG board. Design overall is very good, 4 DIMMs for the highest memory OC and 2x PS2 ports which I adore especially in legacy OS. Some love the "X" look, some can't see the "X" in this shape, some just don't care. Personally for me board can be even painted in Hello Kitty theme until it does it's job.


Basic knowledge


All basic knowledge, basic LN2 OC steps and functions, including instruction of soldering DMI pin are included in elmor's ROG Rampage VI Apex thread. You will also find software and bioses there. All pieces of information in this topic are just a supplement of basic knowledge.


Binning boards


The most inconvenient part for motherboard vendors. I have touched few pieces of R6A boards, earlier ES (so called by uncle Mad Tse - legendary TL's edition) and retail PCB, some of them seriously didn't like me (remember, wrong touch hurts for the whole life!). Basically easy to distinguish good OC sample from a bad one:


a) using KBLX CPU + B DIE memories both AIR (note that you need decent IMC CPU + decent B DIE)


If board boots Dual Channel 2x8 GB 4133 12-11-11 1T with manual settings in BIOS 49/50 6-4-64 RTLs/IOLs it means it's a good board. I played with one board which couldn't boot even on LN2 4133 12-11-11 settings.


b) using SKLX CPU + B DIE memories both AIR (note you need decent IMC CPU + decent B DIE)


If board boots Quad Channel 4x8 GB 4000 12-12-12 1T


c) using KBLX CPU on LN2 if when going cold at some point of cooling down you will get 08 Code Post (means - no memory/channel detected) all the time you can try to clean LGA socket and memory DIMMs with aceton and dry board really well. If after his the next session you get also 08 problems - it means that or BGA soldering under the socket or traces inside PCB are cracked and during change of temperature (during cooling down) when materials, especially metals shrink, signals are lost.


d) using SKLX CPU on LN2 if you are losing some memory channels it means the same - try to clean LGA socket and memory DIMMs with aceton and dry board really well. If after his the next session you get also 08 problems - it means that or BGA soldering under the socket or traces inside PCB are cracked and during change of temperature (during cooling down) when materials, especially metals shrink, signals are lost.


Though you have to remember that even a good brand new sample can be easily degraded after even one LN2 session which I with other overclockers sadly experienced during Computex time. Though my home retail sample is very strong, so many sessions and runs smoothly! Seems like retail boards have very good quality.




Sadly looks like retail KBLX processors in shops are not scaling good on LN2. Note that all ES CPUs which have records are L633xxxx batches. Even earlier production week than only good LN2 scaling retails KBL LGA 1151 7700K L637xxxx-L640xxxx). The earliest 7740X retails CPUs are L652xxxx if I recollect correctly. Now I have bunch of retail L7xxxxxx batches which are not good in terms of IMC neither in terms of clocks, though I haven't checked that many.




Good 7740X IMC will be capable of doing 4133 12-11-11 supertight Copy Waza stable on AIR in Dual Channel (at SA/VCCIO up to 1.45v).Though in contrary to LGA 1151 platform, we can bin B DIE sticks in single channel (note that on Z270 single stick won't boot 4133 12-11-11, but in dual might even pass SPI32M). So that's a very good news, cause helps us to max out and bin our sticks one by one, even on LN2. At the current moment, KBLX is the best choice to bin B DIE. On good IMC in single channel using fully aircooled platform we can reach around 4200 12-11-11 supertight Copy Waza stable. For more we need to use LN2 on CPU.




Why LGA 1151 CPU has DMI pad and why LGA 2066 CPU (almost two times more!) doesn't have DMI pad? The background story is that both platforms (LGA 1151 and LGA 2066) were at early development (when the most crucial decisions are made) close to each other. In the beginning of SKL LGA 1151 as we remember only top Asus ROG boards had DMI voltage control. Normally DMI voltage is (which is responsible for linking bus of PCIE) is linked to VCCIO, and that's how it is in official Intel's spec (similar situation to PLL Termination and Standby voltage), which all other vendors followed. ROG R&D managed to make separate lines for each voltage, which helped LN2 OC, especially for 3D (stability of PCIE) and eliminated ColdBootBug. When there was time for finishing pinout for the final version of KBLX LGA 2066 CPUs (at early stage of development), Intel R&D was asking mobo vendors what they can add/remove, what is crucial for their motherboards designs, ROG R&D decided to stay quiet about DMI pad being afraid that their secret might be somehow hijacked by other competitors if they say they need it. So finally Intel removed it from final specification of KBLX LGA 2066 CPU. After the fact when Intel learned the hard way that XOC needs this DMI voltage, it was too late to change the design, but Intel R&D showed the resistor on the back of the CPU which is responsible for DMI Voltage, so Asus created DMI pin which works just like simple trimpot mod - changes resistance. I love it and I hate it. I love the idea - it's seriously brilliant. I hate it cause it's very easy to damage DMI resistor on the back of the CPU. In order to avoid damaging your CPU try to mount it very carefully, pressing it at the angle to the edge of socket which is far away from DMI pin and then slowly lean back CPU into the socket. Sadly DMI pin has to give high pressure to the resistor, cause when going LN2, metals shrinks and with more soft pin there were issues of contact. If vendors were more sharing knowledge, we wouldn't have this problem. That's why we have to share our XOC tricks! :)


Do I need DMI pin?


With installed DMI pin you can control DMI voltage - and use RSVD2, which will eliminate CBB. So you need DMI pin to have no CBB. For 3D it's just enough to use high VCCIO (1.5-1.6v) on most CPUs. Without DMI pin average CBB will be around -160*C on R6A and on some CPUs there might be issues with 3D.


What if I damage this DMI resistor on the back of CPU?


Your CPU will show magical 00 on Code Poster, so some overclockers can be confused and thinking that they killed their CPU forever. When you change LN2 mode jumper to Enabled, then CPU should boot easy. LN2 mode changes much more things, than just unlocks higher voltages ranges in BIOS. There is some special Peter/Jon's/TL's magic behind it. It changes some autorules, signals, disables some parts of CPU like IGP and so on. So if CPU boots with LN2 mode but doesn't boot with normal settings, then just it's high time to resolder DMI resistor on CPU. I already did it few times and it's not so easy, but is possible. Don't forget to protect golden pads from tin to avoid shorts.






1. Direct DIE (no IHS) seems to help a bit.

2. 4/8 threads max stable voltage for multithreaded benchmarks will be around 1.83v.

3. 2D like SuperPI or Pifast - around 1.925v.

4. Keep PLL Termination 1.65v or close to it. Cache frequency scales sadly with high PLL Termination voltage (1.7-1.8v even) but it's very easy way to damage CPU and degrade it hard.

5. If you have shutdowns (without restarts) during benchmark - it means Cache frequency is too high.

6. DMI voltage around 1.6v is fine (lower than on LGA 1151).

7. KBLX has more issues with thermalpaste cracking than normal KBL.

8. Running full out platform, without any heatsink on the board even with KPC Inferno backplate is fine.

9. KBLX ES CPUs tend to degrade a bit, just like KBL.






Most CPUs will do 4000 12-12-12 Quad Channel on AIR. The problem is you need very strong B DIE. Pretty much any voltage over 1.90v is unstable for SKLX and Quad Channel. So actually you need 4x good sticks, which are stable 4000 12-12-12 around 1.85v for Geekbench 3/4. From my B DIE collection, where each stick on KBL/KBLX can run 4133 12-12-12 CopyWaza air, only few are able to do 4000 12-12-12 Geekbench in Quad Channel.


Just use 4000 12-12-12 profile from BIOS pretests. It's pretty efficient.




For AIR leave Transmitter and Receivers at AUTO, it will set around 1.35-1.45v values for 4000 divider and it's fully fine. Though good IMC CPU will do it with Transmitters around 1.2v. AUTO rule will raise it each time changing to higher frequency. Actually you can even lower Receivers up to 0.7v, it doesn't matter. But I tend to change all Transmitters and Receivers at the same time. For LN2 you will have to finetune it because of CBB issues. With auto rule values around 1.2-1.45v Transmitters on most CPUs CBB will be around -30-50*C which is easy to notice with strange codes on the poster: like 00, 67->AE, bd and so on, and strange sequence of booting. After changing Transmitters to 0.7v even at 4000 MHz on most CPU will work, and then instead of -30*C ColdBootBug we have around -90*C up to -100*C, close to ColdBug of CPU :)


With cold IMC gets much stronger and so far all CPUs tested by me (around 10x SKLX cpus) were working great at 4000 MHz 12-12-12 with all Transmitters and Receivers at 0.7v at LN2. Of course you can try 1.0v, 1.1v and so on. Only one 7800X couldn't do more than 3400 MHz at any combination of all voltages on AIR and LN2.


To go to the settings firstly go to Extreme Tweaker -> Dram Timing Control -> IO Control and go down in the tab.








Most of the voltages are pretty standard well known from FIVR CPUs or described in elmor's guide. But we have special AUX and AUX2 options.




Those are "throttle" voltages. AUX is the actual voltage, AUX2 is booting voltage. For booting those don't do anything. On LN2 we can use up to 3.1V. AUTO value on LN2 depends from BIOS, on older versions I have seen 2.7-3.0v set by AUTO. The higher voltage, the less throttling in theory. That is very tricky part. In theory setting voltages very low should help you gain extra MHz but with the cost of bad efficiency. I noticed small influence of voltages for ColdBug and stability, though I haven't encountered throttling issues. For me best values were around 1.5-2.2v. I think it's worth playing with.


Another new voltage is PLL reference voltage which is actually just a "boost" line for all FIVR rails. Some CPUs might have for instance problem to boot with +500 uncore voltage offset but will boot with +400 uncore voltage with +100 PLL reference "boost" which will be pretty much same as +500 uncore voltage. Note that PLL reference voltage boosts all rails together - vcore, vcache and so on.




Do we need to delid CPUs?


Yes, some CPUs have better stock paste, some CPUs have worse factory contact. The more cores - the higher boost in frequency comparing to not delidded CPUs. On 7800X there is actually no gain or almost no gain, on 7820X around 30-40 MHz, on 7900X around 50 MHz. It's also much more reliable and stable. The problem is that paste, even KPC, Grizzly sometimes crack with -11x*C on those CPUs, especially when benchmark crashes (difference of temperatures). It's easy to check if paste is fine or not via Core Temp.

For 7900X at temp. around -80*C-85*C with clocks 5.6/5.7 GHz @ 1.5v during Cinebench R15 all sensors should show -5*C, if some cores are getting readings -2, -1 it means our paste "half cracked", it lowered it's efficiency a lot. We will notice in such case higher CB. It goes in steps like that first boot, first bench - CB -105*C, reboot, and CB will be -109*C or -112*C, moving CB means crack of paste. If you use Grizzly, it will half crack easier than KPC on SKLX, but will regain most of efficiency when warm up to around -20*C. With KPC paste you should warm up much more in order to regain some efficiency, but from my experience KPC paste will crack after few runs, when Grizzly cracks mostly after 1-2 runs. By runs I mean crashed runs, when platform fails, so there is big differences between load and idle and thermal interface cracks. That's why many unexperienced OCers had sometimes lower clocks with delidded SKLX than stock factory paste and IHS.


Is Direct DIE better or same or worse?


For both, small DIE (up to 10 cores) and big DIE (up to 18 cores) we should use direct die without IHS. To protect DIE from dying, we should use a shim. The difference in clocks is not that very big (just few extra MHz), but temperature control is much better. With IHS it's normal to go around 5-10*C below Cold Bug during heavy benchmarks like Cinebench, then we can easily got CB in idle if we don't warm up on time. With Direct Die temperature control range is much easier. Moreover from my tests Direct DIE is the only case when I can bench for hours the same frequency with the same Cold Bug limit without issues of Thermal Paste cracking or "half cracking". Though the key is of course special - proper mounting + the thermal paste itself. Each batch of thermal paste is different. I suggest to experiment and think outside of the box. I had some interesting results with some experiments, including LM and I am still gathering the data.






Memory Frequency versus efficiency


Pretty much on Asus with build in 4000 profile we have good efficiency. It's scaling really well at each frequency without extra effort.


Tests based on AIDA64 READ. All timings like below:




3200 MHz DDR4




3400 MHz DDR4




3466 MHz DDR4




3600 MHz DDR4




3733 MHz DDR4




4000 MHz DDR4






Basically so far each time I failed to set IOLs and RTLs by hand, each combination at once CC error on Code Post, maybe Intel's Management Engine is still a bit immature or CPU microcode. On KBLX it works, on SKLX doesn't. Examples for 4000 12-12-12 settings.


The only thing we can control is DRAM IO Comp, we can loose it or tighten it. Note that Value by hand will always boot one step lower than manual value, so if we want to get 17 -> we input 18, if 18 -> we input 19 and so on.




We can stabilize booting RTLs by manual RTL initial, it will mostly lower per 1 (from 51 to 50) and some IOLs from 11 to 8 and from 8 to 6. But it's pretty much it.




Do we really need that?


Not really, some small differences will be mostly visible in Geekbench, which is the only benchmark for X299 scaling with 4000 memories. For all other 3600 is enough. Ofc SPI and AIDA64 will show big differences, but this platform is not for legacy benchmarks, more like 3D tank :)




1. Remember to set proper Transmitters in order to eliminate nasty CBB by AUTO rule for high frequency memories.

2. Avoid Input Voltage at 2.4v - for me it was just an instant death of a CPU in 5 minutes :) Those CPUs are much more fragile than X99 "tanks" (I have never killed any X99 CPU, seriously, unbelievable I know considering my reputation :banana:).

3. For optimal memory frequency use 1.45v SA/VCCIO.

4. Follow thermal paste/direct DIE tips.

5. If efficiency is bad - try higher INPUT voltage, I encountered many times throttling because of too low INPUT voltage.

6. If benchmark shuts down in the middle it means - it's too hot.

7. Up to 10 core CPU (I haven't tried BIG DIE SKLX on R6A) naked VRM is fine, but better put a fan on it. Considering how VRM is hot overall, with SKLX I wouldn't recommend using KPC Inferno (especially that, temperature around -110*C is not that hard for motherboard).

8. If you get shutdown during benchmark - mesh is too high/too low vcache.

9. If you have worse efficiency with higher mesh - too low vcache or input or too hot.

10. Some CPUs froze in OS during setting high clocks, my 7800X couldn't have set 59 multi by OS software at all, I tried like 30 times, but I could boot at 5.9 GHz to OS and run directly Cinebench R15 with good efficiency. If you don't want to keep temperature control, just use Slow Mode. But pretty much it's very easy for those CPUs to boot 5.9-6 GHz directly to OS.

13. Don't forget about pretested, good B DIE for SKLX. I noticed that some sticks don't like SKLX at all.

14. You can play with AUX voltage in terms of throttling. But sometimes at the total limit, it will throttle because of unstable CPU and at some point we have to stop pushing for more.


LN2 score on my not bad 7820X with pretty good efficiency in R15, showing that board looks pretty solid :)





For now it's all. I might update the topic in the future with some more data or more scores. I hope for those enthusiasts who plan to push SKLX on LN2, some information here might be useful.


Enjoy :)

Edited by Xtreme Addict
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Guest Wimpzilla
really need to bin mobos :/ is this a quality control issue?


QC is done for the standard speeds. Don't think manufacturers spend time to check if the pcb/traces/components are good enough to sustain very high clocks speeds.


Edit: I don't think you could use the word "bin" here, you are not dealing with silicon leakage, you are dealing with traces/pcb/components manufacturing.

Edited by Wimpzilla
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