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AMD A10-5800K Binning (45 samples) [HOW-TO BIN]


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Hey all,

 

So I had the opportunity to get some data from a bunch of A10-5800K CPUs. The CPUs were testing both on air with the TCI K² application and on LN2 (two bins).

 

- Bin #1 = 1.85V, load bios profile and up multiplier

- Bin #2 = max voltage, max clock

 

Test Setup

 

- A10-5800K

- GIGABYTE FXA85X-UP4 (bios F2, F3i)

- HD 7760D

- Der8auer Fusion rev3

- Kingpin Dragon F1 Gemini 2.0 (Fast base)

 

How to bin

 

- install CPU

- open the TCI K² application

- go to CPU info

- note down leakage info and VID

 

tcik2bin.png

 

Basically, you need a CPU that is

 

- Ultra High Leakage

- VID lower than 1.30V

 

My results

 

I tested two batches:

 

- 1219PNN: retail silicon, same I used for the HWBOT Testlab #1

- 1239PGT: 'special' bin

 

trinity-chips.jpg

 

So far, the 1.2875V bin looks the most promising ... should try that one on LN2 I think :D.

 

Just my 2c.

 

400295_10151106792196275_564461010_n.jpg

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  • 3 weeks later...

From my playing around with the trinitys so far it looks like you need a mix of mid to low NB voltages, along with good IMC strength. Though i really haven't put enough chips through my setups yet to build a reliable dataset to prove this. But its a starting point atleast. Since the best IGP numbers generally come from as high of NB frequency as possible.

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  • 4 weeks later...

thanks ~ ^^

 

may i have a 1 question?

how about max voltage (trinity) for stable oc (usually using)

-------------------------------------------------------------

now i use

A10 5800K 4.6G (1.45/load LLC 1.472) /Tem max 60C(liquid) prime small mode 8H pass

Edited by geforcelove
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