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nnimrod

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Posts posted by nnimrod

  1. On 2/5/2024 at 2:39 PM, bartx said:

    What about this one? I have no idea about the difference between AHFD and ADFD models.

    DSC_8369.JPG

    DSC_8370.JPG

    raptor1.png

    raptor2.png

    raptor3.png

    The AHFD has a clear polycarbonate window, so you can see the platter and head. Your drive is functionally the same, but without the window. I want the window because it's to be used in a showy retro computer I'm piecing together.

  2. On 5/27/2023 at 1:25 AM, TerraRaptor said:

    Geforce 7xxx prefer +15 lod through the whole series of 3dmark except nature of 01 (needs adjusting somewhere in +3-5 range).

    Riva will be able to correctly adjust lod with drivers up to 197.45 (maybe up to some early 25x.xx). Younger drivers are better tweaked with inspector.

    Rivatuner shows me a range of +/- 3.0, does the program you're using have a different range for LOD values? I've been using older drivers, at latest 169.21.

     

    I thought perhaps the 101.09 driver that I was using might be the reason why LOD adjustments weren't doing anything, so I tried 169.21. The LOD adjustments are immediately obvious, because the picture is blurry, including loading screens. However the score is no different. In 101.09 the LOD adjustments didn't visibly change the picture at all.

    169.21 Control raw sorted    
    0 1300 1294 Best half average Best half range
    1 1297 1295 1298.0 3.0
    2 1295 1295    
    3 1297 1296    
    4 1297 1296    
    5 1299 1296    
    6 1297 1296    
    7 1296 1297    
    8 1296 1297    
    9 1299 1297    
    10 1295 1297    
    11 1297 1297    
    12 1294 1298    
    13 1298 1299    
    14 1296 1299    
    15 1296 1300    

    Clamp negative LOD bias, and +1.5
           
    0 1297 1295 Best half average Best half range
    1 1299 1296 1298.6 1.0
    2 1296 1296    
    3 1297 1296    
    4 1296 1297    
    5 1299 1297    
    6 1299 1297    
    7 1295 1297    
    8 1296 1298    
    9 1298 1298    
    10 1298 1298    
    11 1297 1299    
    12 1299 1299    
    13 1297 1299    
    14 1298 1299    
    15 1299 1299    

    Then I tried checking the "Color mipmaps" option in 3DMar05 settings, as well as setting LOD bias to +2.5 in Rivatuner, and that resulted in a significant improvement in score, but the benchmark is rendered not sampling the color textures, but solid colors representing the LOD mipmaps or something. Is that tweak allowed?

     

  3. 6 hours ago, Noxinite said:

    Have you explored the shader clock \ delta clock \ integer overflow bios mod to see if the secondary clock is holding back the core?

    Also, I think that LOD should work fine - did you try in 03 or 05? There's a trick to getting it working with 06 on some cards.

    I have no idea re. the first thing. I tried it in 05, and if there's an effect, it's within margin of error.

    stock clocks 3D05
           
    0 1261 1258 Best half average Best half range
    1 1261 1258 1262.4 4.0
    2 1263 1259    
    3 1261 1259    
    4 1259 1260    
    5 1258 1261    
    6 1265 1261    
    7 1261 1261    
    8 1261 1261    
    9 1260 1261    
    10 1263 1261    
    11 1258 1261    
    12 1261 1263    
    13 1261 1263    
    14 1264 1264    
    15 1259 1265    

     

    First run with LOD +1.5 was 1259, inside margin of error. Not sure if you need it to be a small amount, or almost the whole slider, and whether the effect is going to be very small, or multiple percentage points. Is this the right way to set LOD bias? https://drive.google.com/file/d/1enyxWK1r0gXmStYlHrZHxG31DqIPODSp/view?usp=share_linkusp=share_link https://drive.google.com/file/d/1ev8hNfM8vhhVbziuidMrrqNRhPM412JE/view?usp=share_link 

    20230526_214420.png

  4. I'm starting with nvidia 7 series, and 3DMark06, currently on XP x64. Changing LOD/mipmap bias in rivatuner doesn't seem to do anything...

     

    Kinda getting the feeling that efficiency doesn't matter as much in 3d as it does in, say, 32m, because you can just use a current gen CPU. I still need to get at least the basics for efficiency tho. Any good forum threads? I wasn't able to turn hardly anything up via google.

     

    thx

  5. 6 hours ago, TerraRaptor said:

    Data in your table displays just a normal variance imho. I think after 100 runs both datasets will average to the same values.

    I fear you might be correct. But surely I'm not alone in my reluctance to run 32m 200 times to know for sure if one secondary timing is faster...

    Confidence in results would be better if I could reduce variance. And I had much better variance until I tightened to cas 5. Previously at cas 6 I was down to about .2 or less variance between the best half of 12 runs. Cas 5 brought better best runs, and worse worst runs. I hope that I can get the variance down again by going back over seconds/terts.

    One of the important terts was skewing tRDRD_dr/_dd to 5/6. tWR 9 was also very important. 

  6. Thanks for making an account to reply! I'm not sure I understand correctly yet tho.

     

    • Why do we have to wait tCAS clocks to start the burst if the memory is already in the buffer 4 clocks after the read command was processed?
    • And why does this motherboard allow me to set tRTP to 3? Setting it to 3 isn't a meaningless change, it changes performance, and it shows up in the gigabyte software that shows memory timings in OS. Is it setting tRTP to 3 only in cases where the burst has been chopped to 4 bits?

    Do you happen to work in the field?

  7. Context is Z97, giga SOC Force motherboard. Micron D9KPT memories.

    If I understand correctly, a value for tRTP of less than (tCAS+tBurst) - tRP should be meaningless, right? Since the page can't be closed until it's finished with tBurst, even if it's finished precharging.

    In my example case, I have

    tCAS 5

    tRP 5

    tRTP 3 and 4

    tBurst is always 4 (Since a 4 bit burst still takes 4 clock cycles)

    Some SuperPi and AIDA64 results: (666mhz memory is why it's 7 minutes ~46 seconds)

    tRTP 3            
    1 465.828          
    2 466.015          
    3 466.110   best half avg 466.091    
    4 466.140   best half range 0.422    
    5 466.203   best half stdev 0.152    
    6 466.250   read write copy  
    7 466.343   20849 22328 19590  
    8 466.344   20841 22336 19433  
    9 466.344   20837 22328 19413  
    10 466.375   20856 22324 19425  
    11 466.453   20875 22335 19435  
    12 467.891 NEIR 17 20852 22330 19459 average

     

    tRTP 4            
    1 465.594          
    2 465.797          
    3 465.890   best half avg. 465.966    
    4 466.141   best half range 0.625    
    5 466.156   best half stdev 0.246    
    6 466.219          
    7 466.265   20785 22343 19428  
    8 466.328 NEIR 19, 14, NCIS 7 20822 22316 19452  
    9 466.453   20838 22310 19431  
    10 466.484   20851 22331 19452  
    11 466.860   20789 22336 19442  
    12 467.015 NEIR 3 20817 22327 19441 average

     

    In 32m, tRTP 4 is generally better, although less stable (4 fails vs 1 fail for tRTP 3). In AIDA tRTP 3 has unambiguosly better read performance, and by extension, a little better copy.

    • I don't know why tighter tRTP is slower in 32m
    • I don't know why tighter tRTP is more stable in 32m
    • I don't know why tighter tRTP has better performance in AIDA
    • Tighter tRTP shouldn't matter at all because page closure is waiting on data transfer (tBurst), not tRP, right?

    Is this just random error throwing me for a loop? Do you think increasing sample size will make this inconsistency go away?

  8. 15 minutes ago, SaskOCGuy said:

    Thanks for the follow up.

    I have a set of Geil 6-6-6 1333 coming from across the pond, so that's why I was curious.

    Hopefully your sticks scale on cold... Weirder things have happened.

    haha yes, they might scale into being as good as the worst set of PSC on a hot summer day, with peanut butter on some of the gold contacts :)

    • Haha 2
  9. 10 hours ago, Noxinite said:

    I actually tested them the other day when binning my PSC on phase:

    1495644065_HandbinnedPSC.thumb.PNG.3451b729c699f66dcca18925642bfb44.PNG

    What are your thoughts on the PCBs? Is 8155/8117 a good sign or does it not mean anything? It seems like this issue never really was decided fully.

    10 hours ago, SaskOCGuy said:

    How is the devil... I uh mean the 6-6-6 kit doing?

    Not great. Haven't gotten it stable 1000 9-9-8 yet, but I feel like I just don't have the right IOA/IOD combo yet. All timings scale with vDIMM, but scaling ends at 1.82v. Not exact loop 10-20 @ 1.81v, passes 32m at 1.82v, fails initial at 1.83v. And the vDIMM scaling is the same regardless of the IMC volts. Also tWCL 6 doesn't even work at 666mhz. Easy to see why this IC received no attention. I will still freeze them tho, if nothing else because I doubt anyone else has.

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