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Point structure for memory

Rasparthe
in HWBOT Development: bugs, features and suggestions

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Any thoughts on reworking the point structure memory? Seems like it would be a little more accurate to have more than just a hardware records based on each platform. What about World Record points for each platform but hardware points split up based on CL? Each platform split up among the relevant CAS latency, kind of like cores for a multi-core benchmark like Wprime.

 

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  • Quote

    It's hard to say which CL is real and which is not given only the CPU-Z readout. If you split the ranking based on CL then you will have people claiming that 2000MHz+ (DDR3-4000) CL6 is easily possible on Hynix MFR.

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    • Author

    Ahh, didn't realize the CPUz validations could be fudged like that, well that would make it fairly pointless then.

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