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chew*

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Posts posted by chew*

    Ryzen 1800X - Instant system crash when running sequence of FMA3 instructions. Request for verification.

    in AMD CPU Overclocking

    Posted · Edited by chew*

    The BIOS won't let me set an SOC voltage offset of more than 0.2. It puts a hard limit of 1.0 volts. Perhaps it can forced higher via the LLC settings. But I'm hesitant to put settings up the limit of what the BIOS allows.

     

    I'll play around with that a bit tomorrow. But if what you say is true (SOC should be 1.0 - 1.2), and the BIOS number is correct, then perhaps ASUS is simply setting it too low to begin with?

     

    I'm running high LLC and 1.00 SOC my board defaults at 1.1. I found in my case chasing highest clocks I can drop it .100 to drop heat.

     

    For 4 dims populated yes that would be a tad to low by default imo.

     

    My biggest concern is not your board but the report of the crosshair also exhibiting this issue. I'm under the understanding that they are working on updating mainstream boards second top tier first......but if ch6 has this issue..it should have latest agesa already.

    Ryzen 1800X - Instant system crash when running sequence of FMA3 instructions. Request for verification.

    in AMD CPU Overclocking

    Posted

    The reason I wanted you to test win 7 is.....

     

    Logical Processor to Cache Map:

    *--------------- Data Cache 0, Level 1, 32 KB, Assoc 8, LineSize 64

    *--------------- Instruction Cache 0, Level 1, 64 KB, Assoc 4, LineSize 64

    *--------------- Unified Cache 0, Level 2, 512 KB, Assoc 8, LineSize 64

    *--------------- Unified Cache 1, Level 3, 16 MB, Assoc 16, LineSize 64

    -*-------------- Data Cache 1, Level 1, 32 KB, Assoc 8, LineSize 64

    -*-------------- Instruction Cache 1, Level 1, 64 KB, Assoc 4, LineSize 64

    -*-------------- Unified Cache 2, Level 2, 512 KB, Assoc 8, LineSize 64

    -*-------------- Unified Cache 3, Level 3, 16 MB, Assoc 16, LineSize 64

    --*------------- Data Cache 2, Level 1, 32 KB, Assoc 8, LineSize 64

    --*------------- Instruction Cache 2, Level 1, 64 KB, Assoc 4, LineSize 64

    --*------------- Unified Cache 4, Level 2, 512 KB, Assoc 8, LineSize 64

    --*------------- Unified Cache 5, Level 3, 16 MB, Assoc 16, LineSize 64

    ---*------------ Data Cache 3, Level 1, 32 KB, Assoc 8, LineSize 64

    ---*------------ Instruction Cache 3, Level 1, 64 KB, Assoc 4, LineSize 64

    ---*------------ Unified Cache 6, Level 2, 512 KB, Assoc 8, LineSize 64

    ---*------------ Unified Cache 7, Level 3, 16 MB, Assoc 16, LineSize 64

    ----*----------- Data Cache 4, Level 1, 32 KB, Assoc 8, LineSize 64

    ----*----------- Instruction Cache 4, Level 1, 64 KB, Assoc 4, LineSize 64

    ----*----------- Unified Cache 8, Level 2, 512 KB, Assoc 8, LineSize 64

    ----*----------- Unified Cache 9, Level 3, 16 MB, Assoc 16, LineSize 64

    -----*---------- Data Cache 5, Level 1, 32 KB, Assoc 8, LineSize 64

    -----*---------- Instruction Cache 5, Level 1, 64 KB, Assoc 4, LineSize 64

    -----*---------- Unified Cache 10, Level 2, 512 KB, Assoc 8, LineSize 64

    -----*---------- Unified Cache 11, Level 3, 16 MB, Assoc 16, LineSize 64

    ------*--------- Data Cache 6, Level 1, 32 KB, Assoc 8, LineSize 64

    ------*--------- Instruction Cache 6, Level 1, 64 KB, Assoc 4, LineSize 64

    ------*--------- Unified Cache 12, Level 2, 512 KB, Assoc 8, LineSize 64

    ------*--------- Unified Cache 13, Level 3, 16 MB, Assoc 16, LineSize 64

    -------*-------- Data Cache 7, Level 1, 32 KB, Assoc 8, LineSize 64

    -------*-------- Instruction Cache 7, Level 1, 64 KB, Assoc 4, LineSize 64

    -------*-------- Unified Cache 14, Level 2, 512 KB, Assoc 8, LineSize 64

    -------*-------- Unified Cache 15, Level 3, 16 MB, Assoc 16, LineSize 64

    --------*------- Data Cache 8, Level 1, 32 KB, Assoc 8, LineSize 64

    --------*------- Instruction Cache 8, Level 1, 64 KB, Assoc 4, LineSize 64

    --------*------- Unified Cache 16, Level 2, 512 KB, Assoc 8, LineSize 64

    --------*------- Unified Cache 17, Level 3, 16 MB, Assoc 16, LineSize 64

    ---------*------ Data Cache 9, Level 1, 32 KB, Assoc 8, LineSize 64

    ---------*------ Instruction Cache 9, Level 1, 64 KB, Assoc 4, LineSize 64

    ---------*------ Unified Cache 18, Level 2, 512 KB, Assoc 8, LineSize 64

    ---------*------ Unified Cache 19, Level 3, 16 MB, Assoc 16, LineSize 64

    ----------*----- Data Cache 10, Level 1, 32 KB, Assoc 8, LineSize 64

    ----------*----- Instruction Cache 10, Level 1, 64 KB, Assoc 4, LineSize 64

    ----------*----- Unified Cache 20, Level 2, 512 KB, Assoc 8, LineSize 64

    ----------*----- Unified Cache 21, Level 3, 16 MB, Assoc 16, LineSize 64

    -----------*---- Data Cache 11, Level 1, 32 KB, Assoc 8, LineSize 64

    -----------*---- Instruction Cache 11, Level 1, 64 KB, Assoc 4, LineSize 64

    -----------*---- Unified Cache 22, Level 2, 512 KB, Assoc 8, LineSize 64

    -----------*---- Unified Cache 23, Level 3, 16 MB, Assoc 16, LineSize 64

    ------------*--- Data Cache 12, Level 1, 32 KB, Assoc 8, LineSize 64

    ------------*--- Instruction Cache 12, Level 1, 64 KB, Assoc 4, LineSize 64

    ------------*--- Unified Cache 24, Level 2, 512 KB, Assoc 8, LineSize 64

    ------------*--- Unified Cache 25, Level 3, 16 MB, Assoc 16, LineSize 64

    -------------*-- Data Cache 13, Level 1, 32 KB, Assoc 8, LineSize 64

    -------------*-- Instruction Cache 13, Level 1, 64 KB, Assoc 4, LineSize 64

    -------------*-- Unified Cache 26, Level 2, 512 KB, Assoc 8, LineSize 64

    -------------*-- Unified Cache 27, Level 3, 16 MB, Assoc 16, LineSize 64

    --------------*- Data Cache 14, Level 1, 32 KB, Assoc 8, LineSize 64

    --------------*- Instruction Cache 14, Level 1, 64 KB, Assoc 4, LineSize 64

    --------------*- Unified Cache 28, Level 2, 512 KB, Assoc 8, LineSize 64

    --------------*- Unified Cache 29, Level 3, 16 MB, Assoc 16, LineSize 64

    ---------------* Data Cache 15, Level 1, 32 KB, Assoc 8, LineSize 64

    ---------------* Instruction Cache 15, Level 1, 64 KB, Assoc 4, LineSize 64

    ---------------* Unified Cache 30, Level 2, 512 KB, Assoc 8, LineSize 64

    ---------------* Unified Cache 31, Level 3, 16 MB, Assoc 16, LineSize 64

     

    each zen thread is being registered as an individual core with its own L2 and L3 cache

     

    I have a weird feeling that this and some other gremlins some are experiencing could be related......

    Ryzen 1800X - Instant system crash when running sequence of FMA3 instructions. Request for verification.

    in AMD CPU Overclocking

    Posted

    Things I've tried:

     

    • One stick of memory. Crashes both with my Corsair and G.Skill TridentZ.
    • Two different video cards.
    • Two different installations of Win10 on different devices. (SSD + HD)

     

    The only parts I haven't changed are:

    • The CPU. (I only have one Ryzen CPU.)
    • The PSU. (I don't have any spare PSUs lying around and it's too much work to take apart my other builds.)
    • The motherboard. (I only have one AM4 motherboard.)

     

    can you take a picture of the bios voltages for me, namely dram dram termination and SOC

    Ryzen 1800X - Instant system crash when running sequence of FMA3 instructions. Request for verification.

    in AMD CPU Overclocking

    Posted · Edited by chew*

    Mystical can this program run in win 7? If so can you please try it for me?

     

    flanker I have an idea that its not related to that stuff nor smt.

     

    errata I doubt misinformed as to how much cache really exists possibly or the memory.

     

    Before you go rip a windows install put in one quick test. Use 1 stick please run and tell me if they are double sided and if it runs.

     

    Also what is the default SOC voltage on that board.

    ROG Crosshair VI

    in Ryzen | Bristol Ridge AM4

    Posted

    Jon,can you put some info about cpu binning like what do good cpu's do and what bad do,is scaling linear like best on air = best on cold,are there any hard-walls ? Also CPU-NB appears to be linked to DRAM Clocks from what i see in screenshot,is it possible to adjust it independtly? Thanks

     

    LOL 3.9 bad 4.1 good. you want to spend $329.00 USD at min to bin for a water/air chip to gain 100-200?

     

    $500 chip binning for ln2 will get expensive quick.

    Ryzen Targets for Launch Day

    in Ryzen | Bristol Ridge AM4

    Posted · Edited by chew*

    Msi has a board with 8+4 cpu power now.

     

    Looks like 4+2 for phases? tough to tell. I see 6 chokes.

     

    oops missed 4 chokes under heatsink. Total of 10. Weird layout cap wise with a mix of electrolytic and surface mount ( been awhile name escapes me )

     

    Seeing a trend with the top end boards now.

    Ryzen Targets for Launch Day

    in Ryzen | Bristol Ridge AM4

    Posted

    So lets look at some facts.

     

    We have 95watt rated tdp turbo chips.

     

    Safe to say that non turbo fully clocked to turbo speeds is going to consume more than 95 watts.

     

    The majority of boards thus far have an 8 pin ( 150 watt )

     

    Then we have the ASUS ROG hero with an 8 + 4 ( 225 watt )

     

    I am not a rocket scientist and been away for awhile but im going to guess the Hero is not the top tier of ROG. If this is not a top tier and they are supplying 225 watts I'm quite sure there is a good reason.

     

    That said if the hero is supplying 225 watts and my sources have reported no cpu deaths but confirmed board deaths ( no mention of which boards ) I think its safe to assume that when oced under extreme conditions these chips may be exceeding 150 watt draw.

     

    conclusion? We may see and want to wait for beefier powered boards ( those of us who plan to beat the snot out of these chips loaded 16 threads ln2 )

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