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Arshia - DDR4 SDRAM - 49321 MByte/sec. MaxxMem Read Bandwidth


Guest alatron978

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Guest alatron978

Maxmem really needs more verification then just a screen shot. The CPU-Z timings section in that is misaligned and clearly faked. https://imgur.com/a/fidNURd < Evidence of the score being faked can be seen here. This isn't Arshia's first faked maxmem score either, https://hwbot.org/submission/4412800_ this score is fake and is evident in tRAS being 20. The Zen 2 tRAS register only supports running values at or above 21, meaning 20 isn't possible.

Edited by alatron978
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Moderators can detect if a screenshot or result has been modified in any shape or form.  Photo metadata can also be analyzed.  Sometimes hard rules like tras at x value isn't always concrete, though I cannot speak for amd.  Somewhat related but unrelated, Gamers nexus went into this in a video when they somehow booted on intel with tras less than 28, but again that was intel and not amd platform.  I'm in no way defending anyone here.  I just wanted to bring this up.

Edited by XGS-Duplicity
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Guest alatron978
4 minutes ago, XGS-Duplicity said:

Moderators can detect if a screenshot or result has been modified in any shape or form.  Photo metadata can also be analyzed.  Sometimes hard rules like tras at x value isn't always concrete, though I cannot speak for amd.  Somewhat related but unrelated, Gamers nexus went into this in a video when they somehow booted on intel with tras less than 28.  I'm in no way defending anyone here.  I just wanted to bring this up.

What platform did Gamers nexus use to boot sub 28? Can you link this video?

I'm just curious because not all intel platforms are limited to 28.

The tRAS value is read directly from the tRAS register in the CPU, if the value is below the supported range it literally can't read said value.

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5 minutes ago, alatron978 said:

What platform did Gamers nexus use to boot sub 28? Can you link this video?

I'm just curious because not all intel platforms are limited to 28.

It was an older video, he said they got into windows with tras 26 if i recall correctly.  I only have 1 year desktop oc learning so I don't know everything but i'm just repeating what was in the video.  I will see if i can find it.  I think its on the gn website actually.   I think it was maybe 6th gen or 7th gen.  ALso, if it can't read said value if it is lower than default, is there a chance it displays to the lowest default value if it was lower than default?  Can someone test this?

Edited by XGS-Duplicity
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Guest alatron978
5 minutes ago, XGS-Duplicity said:

ALso, if it can't read said value if it is lower than default, is there a chance it displays to the lowest default value if it was lower than default?  Can someone test this?

There is a chance that it auto-corrects to the lowest possible value if the bios supports that functionality, even if this happens it will still display the lowest possible value since that is what is in the cpu's register.

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10 minutes ago, alatron978 said:

There is a chance that it auto-corrects to the lowest possible value if the bios supports that functionality, even if this happens it will still display the lowest possible value since that is what is in the cpu's register.

Understood.  I don't know as much as you guys.  Just theorizing here to be honest.  But if you think its fake, have a moderator analyze it to be sure.  I would maybe contact a moderator first in private before calling someone out, just incase you are mistaken.  It can save yourself from having to make an apology later on if you were incorrect.  If the person was sponsored or in the process of landing a sponsorship deal and wrongfully accused, they could sue for libel if they suffered any damages/losses from the incident.  Always cover all angles.  I do respect the questioning of authenticity, it is important.  With that said, I also welcome moderators to analyze my recently posted result and have no problem running it again if need be, I could even take camera footage of everything if that is what they desire though I think my screenshots will suffice.

Edited by XGS-Duplicity
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Guest alatron978
19 minutes ago, XGS-Duplicity said:

Here is the GN video from 2018.  It's written that they booted with tras 26 in the tras timing explanation on the webpage.  It was 8th gen.

https://www.gamersnexus.net/guides/3333-memory-timings-defined-cas-latency-trcd-trp-tras

 

I see, that was 26 tRAS on a 7980XE which supports 26 tRAS. I'll also add that the Wikipedia definition that GN used for tRAS wasn't entirely correct and I'll explain.

Wikipedia: “The minimum number of clock cycles required between a row active command and issuing the precharge command. This is the time needed to internally refresh the row, and overlaps with tRCD. In SDRAM modules, it is simply tRCD + CL. Otherwise, approximately equal to tRCD + 2×CL.”

This was the definition GN copied, the first two sentences in this definition are correct but the last one is not. tRAS in SDRAM is able to be below tRCD + tCL as the internal data is already pulled out of the physical memory cells into the prefetch buffers after 1 physical memory clock cycle (4 physical I/O clock cycles). Due to this, the memory is already able to be precharged.

Actual minimum ACT to PRE command period for reads is tRCD + tRTP.

Edited by alatron978
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2 minutes ago, alatron978 said:

I see, that was 26 tRAS on a 7980XE which supports 26 tRAS. I'll also add that the Wikipedia definition that GN used for tRAS wasn't entirely correct and I'll explain.

Wikipedia: “The minimum number of clock cycles required between a row active command and issuing the precharge command. This is the time needed to internally refresh the row, and overlaps with tRCD. In SDRAM modules, it is simply tRCD + CL. Otherwise, approximately equal to tRCD + 2×CL.”

This was the definition GN copied, the first two sentences in this definition are correct but the last one is not. tRAS in SDRAM is able to be below tRCD + tCL as the internal data is already pulled out of the physical memory cells into the prefetch buffers after 1 physical memory clock cycle (4 physical I/O clock cycles). Due to this, the memory is already able to be precharged.

Actual minimum ACT to PRE command period for reads is tRCD + tRTP.

I assumed 8th gen because of the chart above it was with an 8700k, my mistake.  Yeah i don't know anything about x series intel stuff, never messed with it.  I just use a 9900k because gaming. 

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Guest alatron978
11 hours ago, Sparky's__Adventure said:

I have seen tRAS 21 on AMD before on multiple occasions. One example is Duck Oc, one of the resident overclockers and memory binners for Galax. His screenshots are available on his Facebook page. I have also seen overclockers Karta and Ry Dumo use 21 tRAS. All were done on a Crosshair VIII Impact.

Yeah 21 is completely possible but the score I linked showed 20, which isn't at all possible. It's the same as running 5000 14-14-14-27 on a 10900K... it's not possible.

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Guest alatron978
8 hours ago, Sparky's__Adventure said:

@alatron978 I'm pretty sure I saw someone use tRAS 18 before, although I'll have to go digging.

Next submission of his will have more proof.

 

You would not have seen this on a zen 2 chip. It must have been x99, x299 or something else.

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Fairly certain there would still be a profile link on google to his profile though, it just would just direct to not found page.  I deleted an older hwbot account before when i thought i was quitting OC awhile back and it still shows up in google even though it no longer exists. 

  o yeah, almost forgot to mention, i did a second memtest, longer duration than the first and video recorded it.  I added it to my post, feel free to verify the authenticity.  I'm sure you or someone else already inspected all the photos though. 

 

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