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yosarianilives

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Posts posted by yosarianilives

  1. 54 minutes ago, Digg_de said:

    BetrayedPredator: reported by user due to possible cheat (Haswell Refresh and not a Pentium haswell chip)

    Who using this as second Account? ?

    At the Benchmate Comp he reports me cause is was using Coffee Lake DDR4 and not a pre Skylake DDR4 Sys........

    I think he got confused on the first, for the second I'm gonna have to ask his thought process ?

  2. I hate to ask more questions but at this point fuck it, for the igp stage it says haswell (pentium) for allowed arch, does this imply that haswell i7 and i3 is not supposed to be allowed? If they are then is xeon allowed? Because xeon 1275 v3 with p4600 graphics running stock beats all except 3770k and 4770k igp for ice storm. So even running this xeon stock would beat a pentium g3258 OC'd to the wall or an i3 4170 (3770k is the only ivy igp worth running at all)

  3. 12 minutes ago, Mr.Scott said:

    I also dig the rig pic shown is running a P4 641 on it.

    Not even a pic running either of the mentioned CPU's. lol

    You must've missed the comment where I said we did testing on a p4 (needed it to flash a newer bios). But honestly what outward physical difference is this rig gonna have with cpus switched and nothing else changed?

  4. Just now, Mr.Scott said:

    Can't prove any of it positively, that's why.

     

    I live about 2 hours away from Darth so sometimes we bench together. Didn't realize there was an issue with using the exact same rig pic when only the cpu was swapped. Next time we'll make sure to get a pic of the rig from a different angle for each cpu used on the same board/mem/psu/gpu/pot combo.

  5. 4 minutes ago, ShrimpBrime said:

    Funny but why such a low clock speed?

    You're only giving the hint away that end result sandbagged subs will be submitted later. 

     

    The bios only allows to set up to 300 fsb. Set fsb only gave us 5ish fsb, likely due to memory timings trained not allowing much movement. Am currently researching to see if there's a way to get more fsb, or if I can figure out modding this bios. So far the only modded bios I've found for the board gives the 5:4 memory divider instead of the 3:2 divider that you get forced with 1066 fsb chips. If you know of a bios that gives me what I want or know about modding AMI bios I would always appreciate :)  Also looking to get it to force yorkies to post at 266 fsb so I don't need to pad mod them to get a post.

  6. Just now, ground1556 said:

    windows time is 12:08 and 12:11 which does appear a little odd

     

    1 minute ago, Mr.Scott said:

    LOL

    You are a master of deflection.

    Sorry, realized what you were really asking about after I answered. Edited answer above, but basically board resets cmos when it loses psu power, we turned off the psu when we swapped cpus and didn't bother to fix the time in bios so it always posts initially at 12 am. We had done some testing on a p4 and found that this board will post right up at it's max allowed set of 300 fsb so we didn't take a lot of time OCing it.

  7. 6 minutes ago, cbjaust said:

    Why does this entry: https://hwbot.org/submission/4209716_darthresin_cinebench___2003_core_2_quad_q9700_1678_points and this entry: https://hwbot.org/submission/4209706_yosarianilives_cinebench___2003_core_2_quad_q6600_1505_points have the exact same rig picture? Also these two scores on LN2 were apparently done 3 minutes apart on apparently the same hardware with the exact same desktop...

     

    1 minute ago, Leeghoofd said:

    @Darthresin   @yosarianilives

    any inputs on the raised topic ?

    Was a group bench session, can understand the confusion

  8. Well after reading again through this thread I've realized I might've been "a little" off the mark. Definitely very different than ddr2 on a logical side, which imho is what matters the most as logical standards can work on all kinds of physical standards.

     

    So now forgive me if I completely understand how this memory works but could you achieve higher clocks if you replaced the buffer with an fpga that can attain higher clocks? Seems like something we may one day see if it's possible.

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