Antinomy

I agree to Christian The result was valid when submitted. So it would be nice to rebench or reload the picture but not necessary.

Storage server failure killed screenshots that were accessed during the error. Happened a few months ago.

Happy Birthday, Pieter-Jan! It's very nice to have you around despite the fact it's not possible to get a reply from you. Best wishes, have a nice time, more free time (esp.) and so on.

I absolutely agree on this one.The only thing that I want to show is judging old results by new rules - that's what's not OK for me. For example, #1 I didn't post a GPU-Z screenshot since it shows nothing. Like it is here: http://hwbot.org/community/submission/1067271_antinomy_3dmark2001_se_630__656_marks You can clearly see that GPU-Z is rubbish here and suppose I didn't have enough space to stick it in (but I used other utilities that could identify the GPU). #2 Same case, but an updated GPU-Z is capable of showing the correct GPU now. So my result goes banned because I didn't put the rubbish on the screen that time while GPU-Z now does show it right. Who cares about the rules and situation in the past, when the result was made and submitted! Oh, you're ripping the time-space continuum That's the kind (not exact case, of course) logic involved from the Rules point of view. What exactly is wrong using the current rules is just additional info.

Unfortunately, usually we find a thing as a cheat and not a loophole the hard way.

Only rules make it clear. I've got some CPU-Z validations claiming they are invalid even without overclocking no matter what version I use (in face, it came out only with the newer ones, after 1.44) - should I delete them?

It's not a bugged run like 3DMark runs are. So this case is not completely clear. And things that are clarified by the rules are applied to older submissions.

I like your supplies, waiting for fun!

Excuse me, it was about "according to the rules" expression. This expression (in my opinion) can't be applied to results submitted before the rule was implemented. This is the only thing I wanted to say. I don't judge the rules and I don't judge the submissions. If I'm wrong, we should start blocking submissions made not according to the present rules. Ridiculously, it will mean to delete all non 1.5XS Superpi runs and non 1.55 wPrime even to submissions that are dated before 1.55 version was developed. That's what I've meant claiming "dead wrong". Once again, forgive me if it was too offensive.

Dead wrong here. The result has been submitted on 21.03.2008. The rule was added on 31.08.2010 http://www.hwbot.org/forum/showpost.php?p=69072&postcount=24 So each time we add a new rule, we ban all the old results? It's the way it was with me. But it's not the way I think it is right.

Did you try to turn PAE on? If not, disable it manually. And stuff like DEP too.

Christian Ney, nope. Barton runs PCM 04 too

Congratulations, doc! You've finally arrived.

Massman, nice idea. Because 1.1K is very high but 2k is kinda insane. jmke, I'll check, thank you.

I assume they've traced clocks to external PLL instead of integrated. This means that the clockgen pads and contollers (DMI/PCI-E/SRC (SATA)) clock inputs are not connected on die but are output on package pads. It's the easiest explanation. Another one is that QPI controller is in the CPU while all others are in chipset. Then external PLL is used for clocking the CPU while P67 clockgen is used for it's stuff. But the classical placements of the clock generator on the PCB makes me think that the first idea is closer. Time to write a letter to Asrock support begging them to make a right board with external PLL for SB?

What I've been thinking about today is - why can't the CPU be pushed if everything else can? http://www.xfastest.com/cms/tid-55340-5/ - I can see a 200MHz overclocked system on a P67, do you? That's what I was talking about - if this can be done on 1156, why not do on 1155? I thought that the clock were bound inside the chipset, not CPU package. If what you say is true then it's another case and yes, nothing can be done. But...

Massman, what do you name under "Sandy bridge technology"? Can you name the parts that you mean under this? Show be read as: Now Intel has perfect control over FSB, Multiplier and no motherboard can overcome the limitations yet.

Another question - when will we see a motherboard with an external PLL with a normal implementation?

So, it's able going >110MHz by QPI?

Does anybody know when the vendors are going to produce a mainboard with an external PLL? Maybe the ones who have contacts with engineers might answer this question.

Waiting for AsRock to make the contrary - an LGA1155 board with P55 chipset?

Not the first time to see such stupidness. I've seen photos of AMD K8 (maybe the sellers thought that they're like K7 which had and open die and you could put a sticker or the package). I'd say it's a rather common bug. I've heard about cases when the cooler was glued to CPU (thermal grease - WTF is this? ).

Nope, read the rules.

Ты объясни мне только одно - почему ты меняешь постоянно флаг?

Thanks!