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Strunkenbold

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Posts posted by Strunkenbold

  1. On 12/24/2019 at 2:00 AM, acm_fan said:

    MSI MPG X570 Gaming Edge WiFi need to fix it.

    What hwbot have today:

    1. https://hwbot.org/hardware/motherboard/mpg_x570_gaming_edge/ - fake (no model w/o Wi-Fi)

    2. https://hwbot.org/hardware/motherboard/mpg_x570_gaming_edge_ac/ - fake (no model with "AC")

    3. https://hwbot.org/hardware/motherboard/mpg_x570_gaming_edge_wifi/ - it is! But no needed round brackets

    Here's a link:

    http://valid.x86.fr/gzpkha

    (fullname copy-paste don't work to found the model yet).

     

    The same situation with MPG X570 GAMING PRO CARBON WIFI.

    https://www.msi.com/Motherboards#?tag=MPG-Series

    This should be now fixed. Also added other MSI MPG boards.

    • Thanks 1
  2. On 10/31/2019 at 11:15 PM, Leeghoofd said:

    Nope moved them to PCIe 3.0(CPU)

    On 10/31/2019 at 8:52 PM, yosarianilives said:

    For the igp stage is hades canyon allowed? I noticed that in the db Vega M GL and GH are both still listed as integrated, and the cpu used is kabylake so unless they were explicitly denied they would be allowed.

     

    I'm honestly not really happy with that move. Depending on who you ask, the definition of IGPs are sometimes GPU integrated in the CPU die or / and CPU and GPU die on the same package. So the Polaris GPU is on the same package with the kaby lake CPU. They are connected via a pcie bus, but it shouldn't be too surprising that they don't use something super fancy given the fact that a Intel part talks to an AMD part. 

    Anyway I remember clarkdale having a GPU and CPU die. They were on the same package. Would anyone argue that it's not an IGP?  So I fail to see what makes the difference here. 

    Of course those parts are much faster than all before existing IGPs. But that can't be the criteria, right?

    If you agree, I would move them back to integrated and disallow the usage in this stage.

     

  3. On 11/25/2019 at 2:26 AM, yosarianilives said:

    It's distributed through the planning thread, I couldn't find anywhere where it was explicitly allowed on second look. I mentioned that it seemed allowed enough times without it being explicitly denied is the closest it seems. But most of the discussion is people yelling at me for suggesting that 5775c should be allowed because 6770hq and 4980hq is so my asking if mobile is allowed mightve been lost in that. 

    I red now through the 8 pages of the design thread. Yeah, you didn't really receive any answer to your question. So I think the intention was, to only allow non eDRAM devices. I guess Alby wanted to see a high megahertz competition between different gens of k processors, and he especially wants to see some haswell action. So that's why, no broadwell allowed because they share the same socket 1150. But Intel integrated stuff is really complicated, having tons of different IGPs with strange names and CPU sockets.

    I remember the the i7 4770R, which is by definition of intel a desktop CPU, but bga and quite rare and expensive. I think properly tuned this can maybe eliminate the need of a ivy bridge score. And also other high end iris plus laptop parts could possibly see an advantage over ivy. It all depends on how much you can push ivy IGP under LN2.

    Back to my initial question, based on my theory above, the Chinese CPU creations aren't allowed in the comp, correct?

    • Like 1
  4. I didn't read through all of this, so this may have already answered. Stage 10 is divided by CPU socket. So Mobile chips can be used. There are some fancy Chinese CPU creations, having a mobile chip on a shim for LGA socket. It's basically a form of BGA to LGA adapter. Running a mobile chip in a desktop motherboard can yield some slight advantage, especially if you plan to run them under cold.

    But technically those are custom creations and thus are actually falling under the retail available hardware rule. On the other hand, the CPUs itselfs where retail available. It's just the shim that was created by third party and they are available to anyone who can organize the shipping from China. I just want to double-check that, hence I ask.

    https://m.intl.taobao.com/detail/detail.html?id=601707837844&spm=a21wu.9600033.recommend.1&main_itemid=569787869219&go_item_id=601707837844&pvid=e873a56b-b808-4a4c-a86e-19b08e3f2a48&utparam={"x_object_type"%3A"item"%2C"x_object_id"%3A601707837844}&scm=1007.20269.110938.1002003000000001

  5. On 11/5/2019 at 8:38 PM, Leeghoofd said:

    This was one of the reasons I choose Deneb (6M), however it seems some CPUs are not in the right category. I can't fix the Database right now, how about allowing all Denebs, but no unlocking of the cores. Is that a fair proposal?

    Seem someone added CPU Core Deneb (6M) but never matched a real CPU to it. So it was actually empty and never used. I can create cpu cores with individual cache sizes though- if it was actually intended that way, no problem.

    However for now, I renamed Deneb (6M) to Suzuka and matched those Opteron 13xx parts to it.
    I also made Phenom II X4 840 and 850 a Propus.

    • Like 2
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  6. 5 hours ago, ObscureParadox said:

    @Leeghoofd I'm going to be shooting myself in the foot here, but on the Deneb stage, as it stands the Phenom II X4 800's are currently listed as Deneb on the HWBot database when in reality they're actually Propus cores. Can I suggest removing them from the stage if possible. I don't think anyone has submitted with one yet but that's the only 4core Phenom CPU I currently own which is why I went to double check on here.

    is it @Strunkenbold who is currently maintaining the database? I'm not sure.

    Edit : Sorry to clarify, they are Deneb cores, but they're nerfed down with the L3 disabled which technically makes them a propus core. I suppose it's the same rule that applies to not allowing unlocked Athlon II X4's? Sorry to open a can of worms and complicate things.

    Ok I just checked cpu-world and saw that the 840 and 850 are indeed Propus and need to get fixed in the db. Thanks for the hint! 

    But the rest of the 800 series has a L3 cache and are Deneb. 

    I never understand why we make such restrictions though. I mean you can basically make a Deneb from all lower bin 45nm K10 chips. Why not allow them all? 

     

    • Thanks 1
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