Heads-up for Sandy Bridge

[Massman]

Hey guys and gals,

 

Just a heads-up for the upcoming Sandy Bridge release. In Rev4, we'll no longer accept non-retail revisions to participate in the end-user leagues (in the rev4 document named 'XOL'). So, there's no need to hunt early killer batches (if there actually are any) if you're not going to participate in the MFC league.

 

In terms of 980X, this would mean:

 

- A0 only in MFC league

- B1 ES allowed in all leagues.

[K404]

Thanks for the info

 

What about I5 ES? Retail aren't consistently matching those either

 

EDIT: Was the 980x just an example, will this rule apply to all architectures?

[Massman]

The 980X was an example, we will not take away points from scores posted months ago.

 

i5 ES = i5 retail silicon. Also, I've seen retails that can match ES. Consistency is relative to the amount of tested pieces ... if someone tests 100 ES and find one or two golden ones it's normal you think retail is not catching up if only 1 out of 75 is golden

[Monstru]

Fair approach.

[K404]

I was under the impression that I5 ES Vs retail was a pretty good parallel to the 980x situation?

 

 

Top 20 for each:

 

I5 wP1024: 7/19 are ES (one picture lost)

 

980x wP 1024: 4/19 are ES (one picture lost)

 

 

 

SPi 1M:

 

Top 20:

 

980x: 9/16 are ES

 

I5 (searched by P55) 11/19 are ES

[Massman]

# submissions with 980X: 12329

# submissions with 32nm i5: 1343+818+262+453+560 = 3436

 

Overall figures, yes, but I'm sure you'll see something similar BM-specific.

 

//edit: also, these numbers don't represent the amount of chips that have been tested before the good ones were found.

[K404]