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Posted

What signals was necessary? So you soldered the output of DDS2 to the reference-clock-oscillator and it caused rising of PLL maximum frequency? Or could you explain what signals go where :)

Good job, that's a hard mod. You can now beat top-socket7-FSB score.

Posted (edited)

What signals was necessary?

 

Sorry, I don't know meaning of the question, where? which?

 

So you soldered the output of DDS2 to the reference-clock-oscillator and it caused rising of PLL maximum frequency?

 

Yes, For example http://hwbot.org/submission/3010261_kotori_cpu_frequency_pentium_3_celeron_mobile_500mhz_766.42_mhz

PLL of this board ICS9248AF-61 maximum 100mhz

By the way K7pro fsb is max 119mhz without mod

 

Or could you explain what signals go where

 

From DDS2 output to Mother board PLL(X1)

Edited by Kotori
Posted
What signals was necessary?

 

Sorry, I don't know meaning of the question, where? which?

 

I did not know anything about number of outputs of this DDS2 device. My question was about number of needed signals to make motherboard workable, stable and overclockable. Signals I meant are for example: pci, memclk, fsb and maybe some others. Now as I can see only output sine wave is needed to "cheat" the pll chip.

 

So REF0 and REF1 pins have to be connected to 14.3 MHz clock source? The second thing is to remove crystal from X1 and X2 and to connect the output sine wave to X1 pin? That's all? :)

 

Are'nt there any "weird" motherboard behaviour? For example: speed-up time (for example 1minute on modded motherboard is 40 seconds real), not working USB or not working peripherials?

 

Good work man! I'm very interested and I was thinking about to do myself similar mod but I didn't know anything about which signals-to-be-modded. (and I did not spend more than few hours doing research on "pll-mod" )

Posted
We need externalPLL thread)

and socket7 WRs need update. :D

 

P5A was unable to clock change in DDS2, i don't know what cause.

Iwill XA100plus was possible but board died before try max fsb.

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