_mat_ Posted May 17, 2018 Share Posted May 17, 2018 It is an OpenCL bug. Sadly there is nothing I can do about it (which is another reason why I want to move to a native calculation path without OpenCL for CPUs). Quote Link to comment Share on other sites More sharing options...
qef Posted May 17, 2018 Share Posted May 17, 2018 All core 3.9? or one core? Quote Link to comment Share on other sites More sharing options...
max1024 Posted May 17, 2018 Share Posted May 17, 2018 Impressive :-0 I see on CPU-Z ES CPU, are the both Engineering sample? Does the server board allow you to change the FSb settings? What are the opportunities in UEFI? Can I read or watch it somewhere? Quote Link to comment Share on other sites More sharing options...
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