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havli - 2x Pentium 2 Celeron 466Mhz s370 @ 574MHz - 171sec 390ms wPrime - 32m


Matti OC

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sorry, Celeron is not Pentium II

http://ark.intel.com/de/products/42097/Intel-Celeron-Processor-466-MHz-128K-Cache-66-MHz-FSB

Mendocino[bearbeiten]

 

Celeron mit 333 MHz (Mendocino) - Oberseite

 

Celeron mit 333 MHz (Mendocino) - Unterseite

L1-Cache: 16 + 16 KiB (Daten + Instruktionen)

L2-Cache: 128 KiB mit Prozessortakt

MMX

Sockel 370 PPGA, GTL+ mit 66 MHz FSB

Kernspannung (VCore): 2,0 V

Verlustleistung (TDP): 17,8–28,3 W

Erscheinungsdatum: 1999

Fertigungstechnik: 250 nm

Die-Größe: 154 mm² bei 19,2 Millionen Transistoren

Taktraten: 300 bis 533 MHz

300 MHz

333 MHz

366 MHz

400 MHz

433 MHz

466 MHz

500 MHz

533 MHz

 

PII =Klamath / Deschutes /Tonga

http://de.wikipedia.org/wiki/Intel_Pentium_II

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http://www.intel.com/design/pentiumii/prodbref/

Cache Size (K) SPECint*95 SPECfp*95 Intel Media Benchmark iCOMP* index 2.0

233 (1) 512 9.38 8.17 364.13 267

266 (1) 512 10.7 8.17 412.31 303

300 (1) 512 11.9 8.82 459.08 332

333 (1) 512 13.0 9.55 498.79 366

350 (1) 512 13.9 11.20 534.61 386

400 (1) 512 15.8 12.40 601.10 440

450 (1) 512 17.2 12.90 658.41 483

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http://www.cpu-world.com/CPUs/Pentium-II/index.html

 

Gray area. Celerons are not Pentium II's but in the same family. The only PII based Celerons, near as I can tell, would be the Covington's and Mendocino's.

 

I hope it goes your way though Matti. :)

Covington is PII Deschutes without L2 cache. Mendocino is based od the same design, but instead od external half-speed 512KB L2 cache there is 128KB on-die full-speed. Celeron has exactly the same architecture (P6) and instructions (X86, X87, MMX) as the "full PII" has.

 

All Covington and Mendocino Celerons are on the list of CPUs suitable for this compettion. I even asked explicitly whether is ok to use Celeron and the answer from Massman was "yes". No grey area here.

 

Celeron has no business with the Pentium, as he has no cache 512

Cache size doesnt really matter. How about mobile PII Dixon with 256KB on-die full-speed L2 cache? Thats almost the same CPU as Celeron Mendocino... only cache is twice as big. All these CPUs belong to the Pentium II family, like it or not. Anyway, in wprime cache has very little impact on score.

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Covington is PII Deschutes without L2 cache. Mendocino is based od the same design, but instead od external half-speed 512KB L2 cache there is 128KB on-die full-speed. Celeron has exactly the same architecture (P6) and instructions (X86, X87, MMX) as the "full PII" has.

 

All Covington and Mendocino Celerons are on the list of CPUs suitable for this compettion. I even asked explicitly whether is ok to use Celeron and the answer from Massman was "yes". No grey area here.

 

 

Cache size doesnt really matter. How about mobile PII Dixon with 256KB on-die full-speed L2 cache? Thats almost the same CPU as Celeron Mendocino... only cache is twice as big. All these CPUs belong to the Pentium II family, like it or not. Anyway, in wprime cache has very little impact on score.

 

Didn't need a lesson bro. I know all that. ;)

I have slockets and Mendocino's. I'll go that route if need be.

Edited by Mr.Scott
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Although I see the issue here, it is in the rules so I guess there is nothing we can do about it, although I agree Celeron isn't P2. Phenom II X4 840 is another CPU I argue about too, Phenom in the name, AMD calls it that but realistically it is just a highly clocked Athlon CPU, so is it a Phenom or not because we wouldn't call an Athlon II x4 the same as a Phenom :P

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Wrong...

Celeron Mendocino (PPGA 370) - PII Deschutes based, 250nm, 128KB L2, no SSE. This is the one I use, see the screenshot.

Celeron Coppermine (FCPGA 370) - PIII Coppermine based, 180nm, 128KB L2, SSE. Not allowed here.

Celeron Tualatin (FCPGA2 370) - PIII Tualatin based, 130nm, 256KB L2, SSE. Not allowed here.

 

//edit:

Mendocino IS NOT based on PII and have L2 integrated cache at full speed frequency, PII have external chips cache at 1/2 clock frequency!!!

Sorry, wrong again. http://www.cpu-world.com/CPUs/Pentium-II/Intel-Mobile%20Pentium%20II%20366%20-%20KP80524KX366256.html Cache location and speed doesn't change architecture of CPU.

Another example is PII Xeon - it has external full-speed L2 cache.... and still is member of PII family. http://www.cpu-world.com/CPUs/Pentium-II/Intel-Pentium%20II%20Xeon%20450%20-%2080523KX4501M%20%28BX80523KX4501M%29.html

Edited by havli
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  • Crew

Diabolik Oc, Mendocino's don't use P2 core but they are P2 family, believe it or not. Mendocino is one of the easiest but it's definitely not the best choice for this contest.

Mr.Scott, the crew has already made a point on this, nothing to discuss. The comp page clearly says "P2 family", not "P2 only".

 

Nice score havli, keep pushing old school!

Edited by Antinomy
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