A7N8X-E Deluxe as an alternative for socket 462

[I.nfraR.ed]

The Option ROM message works, but I guess the code executes too fast to show something. Removed the far return to bios and it now displays it.

I will need to add some artificial delay to make it visible.

[Tzk]

@TerraRaptor

Can you try these two files to see if a) they work and b) if the settings are applied correctly? If you set everything to AUTO on the new Advanced Memory Settings menu the ISA option rom will be bypassed. Stock Settings at 200Mhz FSB are afaik:

• DriveStrength: 4
• Slewrate: 10
• Tref: 1560
• Trc: 13
• Trfc: 15

So you can try booting with values right next to these and have a look at R/Weverything and WPCRedit (B0D0F1 and B0D0F4) to see if these have any effect. If yes, then i did everything right and the mod works as expected. The two bios files are completely identical except Romsips (EBED vs. ED), both got v3.19 BPL and CPC on.

Note: As always these files are completely untested and may brick your board.

A7N8X-E-DLX-1013-EVO-v1.zip

[Tzk]

Doublepost:

And i tried to put the cylinder, sector etc. HDD items to good use. However some crash when you try to select an option (submenu opens but is empty and bios freezes instantly). I guess that you can't use them that easily.... So i stopped for now.

What i haven't tried up to now is the v4.35 BPL MSI uses on some bios, so that's next. I'm still struggling to get my 2x512mb TCCD Memtest stable at 245Mhz.

Edited November 23, 2019 by Tzk

[I.nfraR.ed]

There's my option rom. I've fixed tRC to support up to 31 and switched SR and DS.

Added the full list of options for tREF. Everything works as expected.

PS: Too bad we can't use the IDE options. So the modding kind of ends here. If only we had separate _ITEM.BIN...

The only thing left to try is integrate memtest as an ISA option ROM and control it with some menu item, e.g. EPA logo if you have that in the bios.

NF7_ISA_OROM_v1.ASM

Edited November 23, 2019 by I.nfraR.ed

[Tzk]

Great solution for the huge case switch. I might change my approach to this, too. Even shortens the code by reducing redundancy. Neat.

[I.nfraR.ed]

It's a little cleaner, but has one additional jump. It probably gets compiled to almost the same thing in both cases anyway.

I was searching for a "table" solution, there's this thing called jump table, but I didn't understand it 100%.

Ideally I would want something like this - an array or a key-value pair, etc. But I don't know how to do that in ASM.

const setTrfc = val => {
  const trfcTable = [0x0010, 0x0020, 0x0040 ... 0x1264];
  const value = trfcTable[val];
  writePciReg(...);
};
const cmosValue = readCmosReg(0x77);

(cmosValue > 0) && setTrfc(cmosValue);

 

Edited November 23, 2019 by I.nfraR.ed

[Tzk]

I've read about FASMs struc and struct which both seems to be some kind of data structure: https://board.flatassembler.net/topic.php?p=193530

Taken from the links:

;declare
struc my_struc 1,2,3,4,5,6,7,8,9,A,B,C,D,E,F {
 		.1 dw 1
        .a dw a
		(.....)
		.F dw f
}

;instantiate
my_label my_struc 0x3456,0x9876,'X','r'

;access
mov ax,[my_label.a] 

Question is if we can choose the label based upon the register value. So you'd instantiate the struc with the Tref values in the correct order and just use the cmos value as pointer to the data values in struc.

If this works, struc is more or less a one-dimensional array (or let's say "list") of items.

Edited November 23, 2019 by Tzk

[I.nfraR.ed]

I'm trying to make use of some existing items for custom option. NF7 bios has Small Logo (EPA) option in Advanced BIOS Features setup screen. However, it is only visible in modbin and not in the actual bios. It is set to "visible" and the default option is "Disabled".

Original option looks like this

00 00 02 04 89 F8 40 00 3E 40 00 01 00 00 00 01 00 C3 02 00 00 00 00 00 00

So I have moved it under the rest of the custom options and since I still have SuperBypass labels, decided to connect them to the option.

Modded item is basically the next item from the custom labels, with it's 3 options, mask and cmos register.

00 00 0A 0B FF FF 03 00 79 03 00 0B 0B 00 00 02 00 81 02 02 00 02 00 00 00

Modbin shows it correctly - labels are the correct ones, default option is selected, position in the menu is correct. But after flashing the bios and going to the setup screen, the option is still not there. It is still hidden/removed, but this time the broken EPA logo shows in the right top corner. So I kind of disconnected it, but can't use it, since some subroutine from bios code hides it/deletes it. The ID is changed, but I can't move it to other place in the binary.

Next item starts with 0x20, which according to the struct I've posted on the previous page is "PMITEM", whatever that means.

20 00 EB 0E FF FF E0 00 63 E0 00 09 0F 00 00 04 00 2D 00 00 00 00 00 19 00

Here's what I think is the whole advanced bios features setup screen, or at least significant part of it. Not sure if the $SpeCR %ml$ heading is the start of the setup screen or the end of the previous one.

Most of the labels are similar, my modded one starts at 0x2bc - the last one. There's only one with FF FF in column 5 and 6 - in offset 0x145.

Also 2 items don't have 00 in second column - offsets 0x96 and 0x2a3. Wonder what this is...

Edit: This 0x3 in the second column means a KEY_IN item, I think. This is is a popup menu for the previous option "Delay IDE Initial" with options from 0 to 15.

Edited November 24, 2019 by I.nfraR.ed

[Tzk]

My guess is that the data inbetween the $ml$ and the "bios features setup" string actually does something to the bios items. same for the last few lines of the block, right in front of the next $ml$ string. I haven't succeded in decoding these, though.

---

Someone over at hardwareluxx.de forums asked if it's possible to backport BPL v3.19 to K7N2 Delta2, as these boards are shipped with NVMM v4.35 by MSI. Let's see if this helps MSI boards to reach higher clocks...

http://bierbude.spdns.org:2302/USER UPLOADS/Tzk/MSI/K7N2 Delta2 Platinum/

[I.nfraR.ed]

The v4.35 has tighter timings (primary and secondary/alpha), that's why it is not compatible with many sticks. Perhaps something else, too.

I've read the changelog of B72c from BOSSKILLER and there are things I don't know how to do:

Quote

Decomopresed BIOS method updated.(to normal POST and boot, not like sometimes happend PC POST 1/50 attempts without reason)

Injected SSE into 3DNow! Professional...Result is a new instruction pack..
Forced FPU to use 3DNow! Professional.. Result is 6% gain extra FPU performance.
Latest 2 changes impact all CPU types.Gain the extra CPU Power with Floating Point Operations and Multimedia Applications.

Will have to compared to unmodded bios (or the previous B62).

There are more items missing in the Advanced BIOS Setup screen in the NF7 bios. CPU L1 Cache and CPU L2 Cache are showing in modbin and everything with the items seems fine in the system bios, but they don't show up runtime, just like the EPA Logo option. Trying to figure out how to fix this.

[TerraRaptor]

23 minutes ago, I.nfraR.ed said:

I've read the changelog of B72c from BOSSKILLER and there are things I don't know how to do

May be setting cpu msr registers. I remember cpumsr 0.88 was allowing to force sse support with older athlons. 

[Tzk]

Yes, i also noticed these changes. We'll have to binary compare to ind this trick. I'm unsure if this trick has any downsides and if no, if we can port it to other boards. I'm curious if it has an impact on the efficiency on SuperPi.

[I.nfraR.ed]

There are some results (numbers) he shared at the end of the first post on the linked page, but I'm skeptical about that, maybe something is/was completely broken on the MSI from the beginning. Sadly, pictures are gone.

https://forum-en.msi.com/index.php?topic=84715.90

[Tzk]

I don't believe this either...

Sooo, it looks like there's an even newer BPL available. @digitalbath from hardwareluxx forums found BPL v4.40 inside the NF7-S2G bios.

nvmm440-cpc-on.bpl

[I.nfraR.ed]

Hmm, never thought to check that board! I can probably borrow more things from it for the NF7-S v2.

Some of the Shuttle boards also use the NVMM 4.40.

Edited November 27, 2019 by I.nfraR.ed

[Tzk]

And he found another one: GA-7N400S-L, NVMM 4.62.

Both 4.40 and 4.62 are untested but i suspect they'll work.

nvmm462-cpc-on.bpl

Edited November 27, 2019 by Tzk

[I.nfraR.ed]

I wonder if there's some interconnection with other modules/code in the bios. And by replacing it we get the 100% out of it.

[Mr.Scott]

Edit

Edited November 27, 2019 by Mr.Scott

[I.nfraR.ed]

10 hours ago, Tzk said:

And he found another one: GA-7N400S-L, NVMM 4.62.

Both 4.40 and 4.62 are untested but i suspect they'll work.

nvmm462-cpc-on.bpl 15.25 kB · 1 download

That 4.62 didn't boot. It's 16KB vs 19KB for the rest. I also had to fill the non-overriden part with zeros.

4.40 worked, but can't POST even at  manual 166MHz FSB, it only works at failsafe default for me.

[digitalbath]

4.62 does not work for me either.
4.40 works on my delta2 so far without problems

I think the NVMM bpl was only made for the boards with the southbridge update

[Tzk]

I noticed that the date which is included inside the nvmm doesn't match the version. A higher NVMM version is older than a lower NVMM version - that doesn't make sense. However NVMM v4.35 works on older boards like NF7 and A7N8X. No clue why 4.40 and 4.62 doesn't. Maybe the latter ones need other additional code or newer (hardware) features which the older boards are missing.

[I.nfraR.ed]

NVMM 4.85 extracted from Asrock K7NF2-RAID (nForce2) AMI bios. But it didn't boot on NF7.

I have copied everything between EA (this is a jmp instruction, I think) and FF AA AA BA 00 00 FF FF FF FF where it seems to end. Then padded everything with zeros until the end for the total of 19KB.

nvmm-4.85.bpl

[Tzk]

If you sort them by date, you get this. v4.35 is older than v4.40 which doesn't make sense. Maybe they branched 4.35 off and developed it seperately? At least any 4.x version except 4.35 doesn't seem to work on old boards...

NVDAMC/05/12/2003/v3.02

NVDAMC/06/10/2003/v3.04

NVDAMC/08/25/2003/v3.17

NVDAMC/09/08/2003/v3.19

NVMM/4.40/04/29/04

NVMM/4.35/07/02/04

NVMM/4.62/09/06/04

NVMM/4.85/03/07/05

 

 

[I.nfraR.ed]

Yes, probably needs the newer Southbridge, or there's some other code in the bios that is required in order to make it work. 4.40 from the Abit board at least boots on NF7 with failsafe defaults, while 4.62 and 4.85 didn't even POST.

I've found other 3.xx versions in some bioses and will extract them, but don't expect to be any different than what we have so far with 3.19.

Haven't found a newer NVDAMC though, last one seems to be 3.19.

Edited November 29, 2019 by I.nfraR.ed

[Tzk]

I've seen some modbios which mentioned 3.2x, but i still believe someone either mistyped or just changed the version number on a random NVDAMC as this is the only mention of this version.