ground

I suspected <14s was viable but I absolutely did not expect it to drop this early into the comp! (sorry accidental doublepost)

I suspected

dammit, now I really have to swap boards :D

Found a couple batches that are very reliable at reaching those settings 3918A497, 3914A740 for i7 920 3918A533 for Xeon W3520 3914A739 for i7 975 (my best is 4500 1.23V, but it “only” does a bit over 5.5 on cold sadly since it has a bad coldbehavior - for this batchrange - of -130 sweetspot. My W3520 is happy at fullpot and my other 975 (5.8 valid) at -160.) QR code range for these chips is N3924-N3926, with almost every single chip I’ve found or heard of in this range being 4500 <1.25V and most chips easily doing 5500 on ln2, as long as bclk plays along. looking at LN2 results and old forum threads I’m fairly certain W3570s of these batches certainly exist too, unsure about W3540. I’ve tried finding a 950 for years in this range but without luck. Since I’ve stopped actively looking, I no longer feel like its right to keep this info to myself.

For comparision - the 920 chip Luumi benched - the second best core I’ve found - needs 1.205V for Superpi 32M at 4500 MHz. My W3520 is slightly better (4500 1.19V), but sadly bclk limited. Said W3520 does 4.83 at 1.33V on air and 4.9 at 1.35V on water. On cascade these chips scale absurdly well, 5.5+ at 1.45V or less (with typical scaling of 0.04V/100Mhz this would mean ~5.0 at 1.25V ish, maybe even less given these are scaling well above average and voltage wasn’t minimized on cold.

well thats a proper strong IMC! Lovely clocks and solid score!

If anyone has issues with CPUz 2.15, you are not alone. Without any changes to the OS, its not showing changes to BCLK. Given that clocking up after boot is relevant for memory frequency, the followinng fixes have been found: for modern OS: bcdedit /set useplatformclock true for legacy OS (win XP): edit C:\boot.ini and add "/usepmtimer"

The rule was added specifically with SR-2 in mind to avoid dual socket scores for ycruncher. Given it would be run as single socket in that case, I don't see it breaking the spirit of the rule, so sure.

with these boards you can literally grab some dead 1366 chips, throw them in, pass post once and they will work again in other boards as well. I've done it 2-3 times with DOA Bloomfield chips (I still have no idea how people manage to kill bloomfield), Luumi managed with a couple 32nm ES chips as well iirc. The chips seemed to behave perfectly fine afterwards (had one i7 920 that did 5.3 multicore but still BCLK limited from this trick, core felt good for 5500+ given behavior)

Woah! Thats a proper record! Shows the possibilities with these new tools that have been appearing last couple years for older platforms. Keep pushing!

Mem is slow, with proper mem could do ~6:14 easy at those clocks

could just as well be BABG.

prepare to bin anywhere from 200 to 2000 CPUs.

They recently started allowing old version again

if looking at the global ranking on the right edge of the screen, intuitively I'd expect the lower link - listing the result - to lead to the result. It leads to DDR5 rankings though. Given that the actual result is linked on the right edge of the same table anyways, wouldn't it make more sense to have the link only say "DDR5 SDRAM"?

Tapakah was visiting too lmao

I'm not aware of kingpin doing that, but earlier this year TAGG, Shaggy and I went for it with our collection of dead hypers. https://imgur.com/a/hyper-per-ic-binning-repair-session-feat-tagg-shaggysvk-ground-VZCouIh

disallow optimal platforms? No Haswell for DDR3, no Rocketlake for DDR4, no Raptorlake for DDR5 maybe?

have we had 1151 - 4 different generations? eg 6th, 7th, 8th and 9th gen? Cezanne only seems fine, though the quad cores are a bit of a pain being oem only, maybe make it APUs only? Gives cezanne the edge, but allows 4300G or earlier APUs to play since those quads are more available

E8600/x5260/x5270 QX9750 behind those, other quads have mediocre OC potential due to fsb limitations on them or due to c1 cores.

Sounds fun, but with 4GHz limited to max 1333MHz mem (unless you allow uncore > core which I would advise against), so maybe 4500 limit? That should allow *any* viable mem config given the IMCs. Edit: perhaps unique mem IC, though that would be pretty difficult to enforce.

I wasn't even aware the DFI x58 boards could run gulftown

Missing the literal pile of Single Stages lol

if you have no clue what you are doing avoid this modification.

Sorta suspecting the PSU playing up, didn't dare trying to run my last remaining 275+ chip today. Tried this chip across 7 different boards today, varying between 250 and 273 max, which is very unusual given its typically very consistant across boards, today not even consistent on the same board.