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The official HWBOT DDR3 High-Clock Challenge thread.


Calathea

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But 4800 uncore is hard

 

http://chew.ln2cooling.com/qdig-files/converted-images/Corsair%20GTX2/DI/lrg_gtx2%20DI%202350.jpg

 

If your dropping channels back off RTL a notch.........I was at bclock limit of that board with HT and all cores on......sure it would have ran higher but I never shut cores/ht off for reviews.

Edited by chew*
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Hm, I don't think so.

 

I think I would remember, because I have tried to reconfigure a member competition to a team competition in the past and completely messed up the engine. Instead of being a team competition, it was a combination of user and team competition :D

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Question :

 

Why memory restriction différence between lga 1156/1366 ?, because spi32m more efficiency under 1366 tri channel.

 

I find that there is an imbalance and I also find it more easier to obtain frequency in 1366 than in 1156.

 

in short, why not put the same frequency as on similar architectures 1156 and 1366 ?.

 

excuse me for bad language, you can answering too in french ;)

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wow, just figured out there is a competiton like this going on.

 

honestly, its not quite cheap to own all the required hardware :D

 

1366 board + cpu

1156 board + lynnfield + clarcdale cpu

am3 board + deneb/callisto + thuban cpu

775 ddr3 board + cpu

 

thats a minimum of 2000 euro for all equipment necessary :D

 

is there any word about the prices?

good luck for everybody participating! :)

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LGA1366 is more difficult to reach high frequencies with because of the MEM/UNC ratio on Bloomfield and of course the extra stress of 3x DRAM instead of 2.

 

That's why the required memory frequency is lower for LGA1366.

 

now, i understand

Edited by 0x0n3
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my wife is angry !!! 8 hours for tame the ace of my clarkdale with his rotten memory controller... no sleeping with my wife but i'm happy ^^

 

:P

 

For Clarkdale, it looks like Gigabyte's providing the best BIOS. DDR3-2100 should be possible on all boards, though. Tested 3x 655K and they all did the same clocks under single stage.

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