A7N8X-E Deluxe as an alternative for socket 462

[I.nfraR.ed]

I'm currently limited by the vNB or VDIMM voltage on the unmodded AN7, because all modded bioses can boot 250.

Unfortunately, the modded AN7 seems to be dead (90 post code). It acts like there's no bios chip, while it is perfectly fine - tested on the working board.

I've revived it before, but don't remember how. So I will have to mod this AN7 tomorrow, then see if there's a difference in max stable FSB.

If only we knew what all these timings correspond to...

[ozzie]

i wished i knew 1/3 of what you 2 guys know, even though i dont understand a lot of it its a very interesting read

[Tzk]

22 hours ago, I.nfraR.ed said:

At 10x200 it's about 3098/3147/3098/80.9ns

I've reran AIDA with my Tbred B at 200x10 for comparison:

[EB][ED] Bios Cpu Interface off: 3105/3173/3080/82.1ns

[EB][ED] Bios Cpu Interface on: 3104/3175/3093/80.9ns

You also used [EB][ED] but on AN7, right?

I've also compared [ED] vs. [EB][ED] and found that at multi 8 i can run both up to 260Mhz and that bandwidth and latency are almost the same. No clue why this is different at multi 6.5. However i get stability issues and the [ED] bios won't even run Spi 4M at 260.

 

Edited September 28, 2019 by Tzk

[I.nfraR.ed]

ED tables from latest DFI official bios, cpu interface on, BPL 3.19, Barton 2500+. EB/ED is almost the same, except the latency is a little higher.

Haven't tested other multipliers though.

Do you have your HAL set to "Standard PC"? I also have modded PSU with adjustable 3.3V rail and feed the DRAM directly from it on the modded boards.

Going to mod the boards first, then test other BPLs and maybe romsips.

Edited September 28, 2019 by I.nfraR.ed

[Tzk]

I haven't changed HAL, so no clue what it's currently set to. I ran another comparison with higher multi between ED and EB/ED, a tiny bit of difference in latency (as you said) but nothing else. Looks like this is only an issue at very small multis. I ran 6.5 before... I also noticed that my two A7N8X got a different max. FSB. The first struggles at 255Mhz while the second works its way up to 263Mhz, both Memtest stable.

Then i tried another 32M aircooled at 257x10.5 and here's the result: https://hwbot.org/submission/4249058_tzk_superpi___32m_athlon_xp_m_2600_(barton)_31min_45sec_984ms

I can't increase the cpu clock any further because i forgot to add the Vcore mod... So i'm limited to 1.825V in bios and the cpu maxed out at about 2700MHz.

[I.nfraR.ed]

Not bad at all 

It might be just the board, not all clock equally. I've had NF7-S's that can't go above 250 stable no matter what. And also have boards that do 250+ with just a modded bios and no other mods. 255-260 is usually the sweet spot, at least that's where I end to with most of the chips, because I have to combine that with the multiplier.

Btw, I don't really understand why "timings" for different multipliers are different. Some are "tighter" than others. I personally believe they need to be the same.

Maybe we can try the same timings for every multiplier and see if there's a difference?

Or even go the extra mile and make Barton/Thoroughbred bios and tweak the most used multipliers, e.g. who runs his high-clocking Barton at 6x multi? You normally use from 10 to 12.5 and as high FSB as possible. Then make another bios for older CPUs where hight FSB is not that common and tighten the timings for better scores instead.

Higher multipliers than 12.5 map to the lower ones, so maybe they are using inefficient tables and can really optimize e.g. 259x13.5 if the tables are right and I could get much better score than what I have currently with the XP-M 2500+ at 3500MHz.

 

PS: I now remember what's wrong with the modded AN7. Somehow the thermal sensor thinks new CPUs (Thoroughbred, Barton) are overheating and refuses to start, while it works for older, e.g. Morgan core, and alsways shows 0 degrees for them. So I need to somehow disable/bypass the temp sensor and then will be good.

Edited September 28, 2019 by I.nfraR.ed

[Tzk]

I also assume that the boards clock different, just like cpus. It just comes down to silicon quality i guess.

I also noticed the different timings for the multipliers and i can't think of a reason to tighten the timings with higher multipliers. I extracted the romsips from EBED and stock Asus A7N8X Deluxe 1008 bios and put them aside in a table for comparison. The upper half are the multiplier tables and lower half of the table are the hex values just in front of the multiplier tables inside the romsips. So orange and red in the following image are on the lower half of the talbe, blue and violet on the upper half:

And the table:

I noticed that some timings raise on stock asus between tables (lower on 133 than 200) and some values are lowered with higher multis.

Line 41: last 4 values raise with FSB, but Merlin uses tight settings (between Asus 133 and 166)

Upper half of table: 3rd value raises with multi, 7th and 8th value lower with multi. Also Asus usesa bit tighter 7/8th value on enabled interface

Line 47 to 55: seems like there's no relevant timings on those lines

Edited September 29, 2019 by Tzk

[I.nfraR.ed]

47 to 55 the only difference is line 54, 2nd byte - 133 and 166 CPU interface OFF have 40, while all ON tables and both 200 tables have 00. Merlin's romsip have different values there (line 43).

As for the green line you've marker, I'm also scratching my head what is this and does it matter at all.

My stock Abit bioses always have what Asus do in your tables. It didn't seem to matter for FSB for me, but the new AN7 isn't very good.

Perhaps this corresponds to the selected FSB. However, why Merlin's table is 0C 10 14 14 and why first table is 0C0C0C. There's one more 0C0C0C shortly after the last table, but noone changes it.

Another thing - those 69 in the Merlin romsip, isn't that slacker than 21 in the OFF table?

 

I've modded the AN7, but can't do much more than 250-255 stable and that's for Pi 1M. VDD helped a little, but it doesn't scale at all. The broken board is so much better :(.

I also tried BPL 3.04 from your bios, but it only works with fail-safe. Anything manual and it stops at POST code 04.

Edited September 29, 2019 by I.nfraR.ed

[I.nfraR.ed]

DFI Ultra-B@270MHz with EB romsips. I tried it on NF7, but it's not much different than ED.

[TerraRaptor]

On 9/27/2019 at 2:21 PM, Tzk said:

I used a somewhat similar solution, but didn't come up with the idea to pass the filename into the batch file. Very nice solution, thanks!

Now, here's my files for the A7N8X Deluxe v2.0 and A7N8X-E Deluxe. The -E Deluxe files are untested! So if you intend to flash to a -E Deluxe board, please prepare a backup (programmer, 2nd board for hotflash etc), just in case these files brick the bios.

It would be great if someone brave with a -E Deluxe board could report back if these files actually work. And if not, i can remove or fix them.

1008-RS-A7N8X-DLX-v2.zip 786.43 kB · 3 downloads A7N8X-E Deluxe RS Bios.zip 774.1 kB · 3 downloads

I have checked EBED bios and it works fine. I was able to pass pifast @275 and it validates 282.5mhz 

https://hwbot.org/submission/4254667_terraraptor_reference_frequency_a7n8x_e_deluxe_282.46_mhz

[Tzk]

? Woah! Pifast @275Mhz on Asus is insane. So this bios did give you a bit extra FSB? Very nice! Just remember that multi 6 and 6.5 have a bit looser timings, so your max. fsb might suffer a bit when running higher multis.

I'd also love to hear about efficiency, especially if the EBED bios is less efficient than Trats (or not).

Edited October 6, 2019 by Tzk

[I.nfraR.ed]

That's quite good.

I was trying to beat your Sempron 2200+ result. So I have modded it to Mobile and MP (L5 bridges) and was using the only KT600 board I have (Soltek SL-KT600-R).

The board has Vdimm,  Vnb and Vcore mods, some capacitors added as well. Mobile (L5[0]) enables PowerNow and cancels the default multiplier. In this configuration the CPU is running at 11x multi and doing the Mobile mod on super-locked chips gives you the ability to change multipliers runtime in OS (11x and lower in this case). Not possible on Nforce2, though. I could reach about 233x11, or close to 2600, but the score was still 3 seconds slower. Can't go higher in FSB with this board.

Doing the MP mod bypasses the 11x multiplier and enables max 24x multiplier. On my board, it boots at this multiplier, so it's impossible to get a good score, since 100x24 is 2400MHz already and with the locked AGP/PCI can't raise the FSB much in OS. although I can drop the multi to whatever I want. So maybe if you find a KT600 board that boots at 11x multi, you can brute-force the lower Sempron rankings. AFAIK no pinmods work for these super-locked chips. At least I haven't managed to make it work in the past.

Tried that particular CPU on 3 nForce2 boards and could reach 268-269. Even with the DFI Ultra-B could not finish Pi at 270+, even if it was booting 275+. So maybe that's the FSB limit of the CPU or something I'm missing. Tried all sorts of voltages - NB, MEM, VCORE, 3.3V rail, to no avail. DFI Ultra-B is slower clock for clock compared to Abit and it seems Asus.

 

PS: 275 pifast DC all tight?

Edited October 6, 2019 by I.nfraR.ed

[TerraRaptor]

4 hours ago, I.nfraR.ed said:

PS: 275 pifast DC all tight?

Nope, 2.5-3-3-7 single channel -I was mainly focused on max fsb (as ebed gives very big drop in aida64 numbers - >80ns latency with ebed compared to <65ns with trats-1T).  I will try to break max s462 fsb here at hwbot first (although I know that back in the days there were several results with almost 300MHz done).

I will put my bh5 under SS this week to check if they are able of 275 tight. I will also test performance/handmade romsips soon to build the best bios for my setup

[Tzk]

Isn't the DFI being slower clock-for-clock just a timings issue? I thought about the 10 DFI tables, maybe DFI uses 10 like this: 2 tables for Failsafe, 6 tables for 133/166/200, 2 tables for 200Mhz+ (?). I haven't had a look at DFI bios files, but that's my guess.

-----

Regarding Trats vs. EBED: Yes, i also noticed a great hit in latency, but only at very low multis. Trats allowed me to reach 245mhz, but EBED allowed for 260mhz+. So all in all i get the same latency but higher bandwidth and thus higher performance in general. When i up the multi to between 9 and 11 the hit becomes almost nonexistant. So don't let Multi 6 to 8 fool you.

Here's my AIDA comparison. Note how ED and EBED differ in latency and bandwidth at multi 6.5 and how small the difference becomes at multi 8. At multi 10 both almost got the same latency when clocked equally but EBED gives me about 15-20Mhz FSB on top and thus is faster overall.

I first didn't notice this as i was running a crappy Tbred on aircooling, but EBED is better than you think, especially when running multi 10 or 10.5.

 

 

 

[I.nfraR.ed]

Something else is limiting me, because my BH-5 can do 280-282 tight on s.939. I know, different platform, but still...

I have tried up to 3.85V Vdimm on s.A, but still couldn't break 270. For 268-269 around 3.6-3.65 is enough.

Tried @TerraRaptor registers on 3 boards now - doesn't make a difference for me. I can boot and bench 265+ no problem.

As @Tzk says, there's no big difference with all the tables/bioses I've tried. The problem for me is that there's no difference in max FSB either

I'm still somehow limited to 270 even with slack timings. My good AN7 did 277 DC tight for validation, but Pi was still crashing at 269-270. Have to figure out how to fool/disable that temperature sensor which is preventing me to boot with CPUs that have integrated thermistor.

Another though I have is about the instability with high Vnb. On Abit boards there's no separate circuit for SouthBridge, so it is running at the Northbridge voltage and I thing this might be the culprit with instability at high NB voltage. On the DFI the SB has a separate voltage controller.

Next thing I will try is to use ROMSIP table with all the multipliers using values of e.g. 6x, 6.5x, 7x and see if that lifts the FSB limit.

[Tzk]

Couldn't you just hook up an external VRM and power the nb and sb from there? So like the OCZ DDR booster but for the chipset. Even a tiny DCDC stepdown might do the trick.

Regarding the multi tables: my guess is that you'd get the same FSB on all multis when you use the same table for all of them. So if multi 6.5 doesn't give you any extra FSB over 8 or 10, then using the 6.5 tables won't do much. However i lose about 2-5Mhz fsb when i use multi 7 instead of 6.5. In my case (EBED) 7 ist the tightest setting and 6.5 is the slowest.

I got no idea for your sensor issue, sorry.

Edited October 7, 2019 by Tzk

[I.nfraR.ed]

Theoretically, it should be possible to solder a fixed resistor to the temperature leg on the Winbond W83627HF chip and disconnect it from the cpu diode, but I suspect the Winbond IC itself is at fault, so next option is to probably disconnect the #OVT (over-temperature) pin and probably solder another resistor, so the board never turns off by temperature reading.

As for the external VRM, a simple buck converter should be enough, yes. But for these super-locked Semprons my idea is to use a better VIA board with high FSB (or hook up an external PLL) in order to max them out. Nforce 2 board is not enough to max it out, since we can't control the multiplier and 9x is too low.

Christian Ney managed to validate 285 on his board, so it should be possible to get a decent performance out of a KT600-based MB.

[TerraRaptor]

20 hours ago, I.nfraR.ed said:

PS: 275 pifast DC all tight?

Checked Tzk's ebed bios in dual channel - 275mhz tight is stable in pifast, 277 is not stable in pifast and ends with error, validates @280. Performance sucks. BTW, I don't need that wpcredit tweak with this bios and I feel like there is more scaling with voltage for NB/DRAM (nb is 2.1v and dram is 3.9v for these results). Thanks to Tzk I have now an idea what romsips are and will go deeper now with bios mods. I'm using aggresive cpu interface btw and haven't yet checked optimal.

Edited October 7, 2019 by TerraRaptor

[Tzk]

As mentioned above, retest with Multi 7 or above... I observed that the performance was a lot better with higher multis and it got almost as good as Trats For max. FSB runs 6.5x is perfectly fine though. All in all it looks like you also get ~15Mhz extra FSB, just like i got in my testing.

If you need further help on how to put new romsips back into the bios just let me know.

I also noticed that increased Vnb yielded more FSB. I can reach 260Mhz with 1.825V, 1.875V results in 263Mhz and 1.95V allows for 265Mhz. I guess that further increasing Vnb will give another few Mhz, but my Infineons are right on the limit at 265Mhz.

EDIT:

Found some info about Drive Strenth and Slew rate registers:

http://www.xtremesystems.org/forums/showthread.php?39330-nForce2-Tweaker-V0-2-by-CodeRed&p=504311&viewfull=1#post504311

Note that CodeRed and TicTac suggested that the system will probably hardlock when changing these... So not recommended and only for the sake of documentation

Quote

More Register

Data Scavenged & Super By Pass

thanx to showy again

Data Scavenged Rate
Bus: 0 Device: 0 Function: 4 Mem Controller
Fast:       Register 96 = 43 8-Bit
Normal:     Register 96 = 44 8-Bit

Super By Pass
Bus:0 Device: 0 Function: 4 Mem Controller
Enable:    Register 91 = 49, 8-bit
Disable:   Register 91 = 48, 8-bit

Dimm Drive Strength
Bus: 0 Device: 0 Function: 4 Mem Controller
Dimm 1 Drive Strength, Registers 7D, 81   8-bit
Dimm 2 Drive Strength, Registers 67, 73   8-bit
Dimm 3 Drive Strength, Registers 65, 71   8-bit

Slew Rate 
Bus: 0 Device: 0 Function: 4 Mem Controller
Dimm 1 Slew Rate, Register 7C 8-bit
Dimm 2 Slew Rate, Register 66 8-bit
Dimm 3 Slew Rate, Register 64 8-bit

Strength And Rate Settings

Bios                   Data
1                         11
2                         22
3                         33
4                         44
5                         55
6                         66
7                         77
8                         88  
9                         99
10                        AA
11                        BB
12                        CC
13                        DD
14                        EE
15                        FF

 

 

Edited October 8, 2019 by Tzk

[I.nfraR.ed]

Tried EB_ED tables from your rom and saw no difference. Didn't give me even a MHz over EB or ED.

I don't see much difference in these 3 tables anyway, shouldn't affect the FSB much, at least for most multipliers.

Do you change anything else besides the 6 tables? I've tried up to 3.8V vdimm and 2.5 NB.

Best for NB seems to be around 2.05 - 2.1 and for memory doesn't make a big difference, unless to low, e.g. 3.4V for 270. Usually run them at 3.6V. 

[Tzk]

I should've been a bit more specific in my post... I meant to say that Trats 6/19 has got way better bandwidth and latency than EBED or EB or ED at multi 6.5 (as Terraraptor noticed above). But if you increase the multi to 8 the performance is almost equal, but you get a bit more fsb headroom with EBED/ED/EB. Which one of these you choose doesn't matter as they're almost equal in terms of timings, performance and max. clock.

No i didn't change anything besides the 6 tables when i tested romsips. But i did try different BPL and i think v3.19 gave me the best stability. However i only briefly tried and didn't investigate this in detail.

[I.nfraR.ed]

That makes sense. I get it now.

Abit NF7 can't boot from USB drive, so I searched for a solution and managed to get Plop Boot Manager working with a 8GB USB drive relatively easy.

The board can boot from Network so I have replaced the lan option rom with the converted plop boot manager.

https://www.plop.at/en/bootmanager/rom.html

I have used the following command to prepare the rom

plpbtrom -grabid NVPXES.NIC -forceINT -INT18 -compress plpbtrom.bin plpbt.rom

Next, just add the option rom with cbrom

cbrom nf7.bin /pci plpbt.rom

Verify with /d option, flash the new BIN file and when in bios setup enable LAN boot option rom.

Edited October 10, 2019 by I.nfraR.ed

[TerraRaptor]

On 9/26/2019 at 11:09 PM, Tzk said:

There's a server with a lot of bioses right here:

http://bierbude.spdns.org:2302/Mod-BIOS und mehr/

And for LP B there's these, not sure if modded or stock (beta) bios:

http://bierbude.spdns.org:2302/Mod-BIOS und mehr/DFI/LAnparty B/tictac/

Anyone knows what password is used at that server? I need modded K7N2 Delta-L bios ver. 5.8

[Tzk]

Had the same issue yesterday. Sadly i don't know the PW. This is just a collection someone made, so don't expect anyone to know this...

@I.nfraR.ed

Can you explain a bit what the "preparation" of the rom does? In theory, could we add other modules like Memtest? I'd love to have Memtest86+ in bios (like on DFI Ultra-D), even if it would replace awdflash. However just replacing the awdflash option rom (it's basically your awdflash.exe for dos) with memtest.exe won't work and i'm not sure why. Taking Memtest from Ultra-D bios and dropping it in A7N8X bios also didn't work.

Maybe you got an idea or know if this has been done in the past.

EDIT:

At least i know now that QEMU seems to be able to emulate optionrom boot... So it might be possible to test Memtest optionroms and only flash afterwards to bios.

Edited October 10, 2019 by Tzk

[I.nfraR.ed]

On 10/10/2019 at 8:16 AM, TerraRaptor said:

Anyone knows what password is used at that server? I need modded K7N2 Delta-L bios ver. 5.8

Not sure this is what you're looking for, but it's what I found:

Bios mod verzie 5.7 od Braziliantech -  http://www.ivanbeauty.szm.com/files/6570v57brazil.zip

Bios mod verzie 5.8 od Braziliantech -  http://www.ivanbeauty.szm.com/files/6570v58brazil.zip

Bios mod verzie 5.8 od Lumberjacker -  http://www.ivanbeauty.szm.com/files/K7N2_delta_L_5-8_A.zip

 

Bios mod verzie 5.7 od Braziliantech

 

Bios mod verzie 5.8 od Braziliantech

- "IPCA" can be disabled under 'Power Management Setup'.
- "Onboard Serial Port 2" can be disabled under 'Integrated Peripherals' -> 'Onboard SuperIO Device'.
- "CPU Internal Cache" can be disabled under 'Advanced BIOS Features'.
- "CPU VCore Select": 1.300v, 1.425v, 1.450v, 1.475v, 1.500v, 1.525v settings can be selected under 'Frequency/Voltage Control'.
- "DRAM Voltage Adjust": 2.8v setting is available under 'Frequency/Voltage Control'.
- "AGP Voltage Adjust": 1.8v setting is available under 'Frequency/Voltage Control'.
- "Shutdown Temperature" function can be enabled under 'PC Health Status'.
- Fixes non-boot issue when FSB is at 200MHz e multiplier is set to 9x, 10x or 11x.

 

Bios mod verzie 5.8 od Lumberjacker

- Item "CPU Internal Cache" activated
- Item "Seek Floppy" default setting is "Disabled"
- Item "Hard Disk S.M.A.R.T." default setting is "Enabled"
- Item "Small Logo(EPA) Show" activated
- Item "Super Stability Mode" activated
- Item "AGP Aperture Size (MB)" setting "Disabled" selectable
- Item "T-(RAS)" setting "0" selectable
- Item "CAS Latency" setting "Auto" selectable
- Item "AGP Spread Spectrum" setting "1%" selectable
- Item "AGP Aperture Size (MB)" setting "Disabled" selectable
- Item COM2 changed in "Onboard IrDA Connector" and activated,
- default setting is "2F8/IRQ3" and "2F8/IRQ3" and "2E8/IRQ3 selectable
- Item "IPCA" activated
- Item "Sleep State" default setting is "S3(STR)"
- Item "Power Management" default setting is "disabled" *
- Item "Power Status Led" activated
- Item "CPU Warning Temperatur" default setting is "60°C/140°F"
- Item "Shutdown Temperatur" activated, default setting is "65°C/149°F"
- Item "DRAM Voltage Adjust" setting "2.8 V" selectable
- Item "AGP Voltage Adjust" setting "1.8V" selectable
- Item "CPU Vcore Select" settings "1.300V", "1.425V", "1.450V", "1.475V", "1.500V", "1.525V" selectable
- changed Epa Logo

@Tzk It detects the vendor and device IDs from the original network option rom and adds them to the plop manager binary. Not sure what it does exactly, I followed the instructions on the site. As for memtest, you need a way to somehow invoke that new option rom within bios, so basically add a new entry point (if you know how, I don't), then add labels for the new menu item, etc. You need to know assembly, I think.

What I think people do in this case is change some of the existing code so it jumps to the initialization of the newly added module, which means you have to sacrifice some other existing function in bios.

 

PS: 

Quote

-forceINT: This forces the boot manager to hook the INT 19h/INT 18h. If you have a PNP bios, then the boot manager does not use the PNP bios feature of the boot device sequence. The boot manager will be started before any boot device is tried (when INT 19h mode is used) or the boot manager is the last program that is started when all boot devices failed to boot (when INT 18h mode is used).

I guess you can always invoke it (first or last), but this means (in memtest case) it will always be loaded even if you don't need it and you have to cancel it every time.

Edited October 11, 2019 by I.nfraR.ed