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ROG Zenith II Extreme LN2 OC Guide


safedisk

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LN2 BIOS 

ROG ZENITH II EXTREME 0036 BIOS

DOWNLOAD : https://bit.ly/36aJALz

 

Official BIOS 

ROG ZENITH II EXTREME 0602 BIOS

DOWNLOAD : https://bit.ly/2rngx8Y

01.Update AURA Led FW version to 0202.
02.Update AGESA BIOS code to the latest PI1.0.0.2
03.Improve system performance.
Before running the USB BIOS Flashback tool, please rename the BIOS file (Z2E.CAP) using BIOSRenamer.

 

OCPACK

Turbov and CCX OC Tools : https://bit.ly/2REIMef

MemTweakIt : https://bit.ly/2UhX8An

Zen Perfboost : https://bit.ly/34W7hap (After loading CineBench R15 or Geekbench3 bench then run the boost, just click defaults button after benching to prevent bsod)

 

USB Flashback

USBFLASH_Z2E.thumb.jpg.63feca46a90ca81eaf8ecb516b98479f.jpg

 

 

LN2 OC TIP

Enable LN2 mode, Use the Load LN2 profile as a base template, this uses low vcore so you can save exit when it’s not cold around 0C. You will need to do this before -40C to avoid cold bug. (note, ln2 profile disables some usb ports)

Always press reset if hang 94 for bios 1,, 07/20/21 post codes also can press reset many times to try

Typically when running 8 sticks, the FCLK margin is slightly worse.
To improve margins on the Fabric, two key rails to control are VDDG IOD and VDDG CCD voltage and SOC voltage. VDDG is sourced from SOC voltage and therefore will not be able to exceed SOC voltage. On ambient 1.0 VDDG CCD + 1.10 VDDG IOD is enough to max out FCLK.
On LN2 you want around 0.9 VDDG IOD and 1.20 VDDG CCD.

On the chipset, when bclk is overclocked, the SATA would all drop out. For BCLK oc use a pcie raid card or NVME, and this will do. Typically margins would be better for devices under the CPU PCIE lanes.

TRY NOT TO CLEAR CMOS WHEN CPU IS COLD
IF you clear cmos, FCLK will go back to Auto and CLDO VDDG voltage will too. When cold, FCLK needs to be 1400+ and VDDG voltages if not Fabric will be unstable so you need to torch up to maybe -60c in this case.

There is an FCLK cold bug under LN2 so try to stay around 1400~1600 for FCLK under LN2 to get a good compromise between temps and perf.
To improve stability in this case:
0.9 VDDG IOD and 1.20 VDDG CCD, SOC 1.35v, disable DF Cstates. ~ 40% cpus have no CB when fclk is 1400 with these settings.
Depending on the CPU and FCLK, may have to control temps -120C ~ -170C. 

Typically on ln2, with 1.55vcore and -160++C 5.3~5.5 should run cinebench.
Use performance bias to improves scores, CBAggressive will BSOD within 1 minute so use the tool to execute it then bench then execute Gentle or defaults after bench.

 

Post codes

Hang 92/98 too high VDDG CCD
Hang 90/07 too high fabric/ fabric unstable
Hang 20/21 too tight timings, can reset a few times to try to pass.
Hang 94, often with LN2 bios, can press reset.

 

Z2E.thumb.jpg.b28326bd952ec61f4c20607a3aafae52.jpg

 

CINEBENCH_R15_CPU_10802.thumb.jpg.dc7f79477510a2ecd5a44c51fde0e042.jpg

wPrime_1.5.0.5_1024M_14_148.thumb.jpg.5fbe775f27584f7f9cc92cb050e0f08e.jpg

screen116.thumb.jpg.d7cc002c46d21fbcc454ae285bff7f86.jpg

GPUPI_3.2_1B_CPU_31_067.thumb.jpg.e4edd9af8380ca97a89c7f8cb2b6ce95.jpg

Geekbench_3_Multi-Core_186318.thumb.jpg.7d7bf8643c281b1e78b135d631d62818.jpg

 

Enjoy!

 

Edited by safedisk
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On 2/9/2020 at 8:41 AM, keeph8n said:

When using the newest bios, 0807(iirc), I run into shutdowns when benching on ambient. 
 

been working on y-cruncher testing for ProOC and anytime I OC the chip(4GHz mild boot) it will shut the system off as soon as y-cruncher starts it’s bench run

Is cpu running > 100c? If not maybe vrm protection?

Maybe possible to try another psu.

 

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On 2/24/2020 at 4:22 PM, keeph8n said:

Yeah I’m not sure what it was tbh. Swapped to the big 64GB kit and never had an issue

i have ran into the same issue. pbo and df states seems to not like each other on high soc or high iod voltage and it will go black screen randomly (code 00 test mem) when soc enters non p0 power state. but i stress test non stop, it would never happen. turning on soc oc mode or whatever or forcing soc to run at p0 does not change anything.

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