I.nfraR.ed

47 to 55 the only difference is line 54, 2nd byte - 133 and 166 CPU interface OFF have 40, while all ON tables and both 200 tables have 00. Merlin's romsip have different values there (line 43). As for the green line you've marker, I'm also scratching my head what is this and does it matter at all. My stock Abit bioses always have what Asus do in your tables. It didn't seem to matter for FSB for me, but the new AN7 isn't very good. Perhaps this corresponds to the selected FSB. However, why Merlin's table is 0C 10 14 14 and why first table is 0C0C0C. There's one more 0C0C0C shortly after the last table, but noone changes it. Another thing - those 69 in the Merlin romsip, isn't that slacker than 21 in the OFF table? I've modded the AN7, but can't do much more than 250-255 stable and that's for Pi 1M. VDD helped a little, but it doesn't scale at all. The broken board is so much better :(. I also tried BPL 3.04 from your bios, but it only works with fail-safe. Anything manual and it stops at POST code 04.

And it was much more easy when multiple scores per user were allowed, e.g. I could handle a whole AMD sub-competition alone ?

Not bad at all It might be just the board, not all clock equally. I've had NF7-S's that can't go above 250 stable no matter what. And also have boards that do 250+ with just a modded bios and no other mods. 255-260 is usually the sweet spot, at least that's where I end to with most of the chips, because I have to combine that with the multiplier. Btw, I don't really understand why "timings" for different multipliers are different. Some are "tighter" than others. I personally believe they need to be the same. Maybe we can try the same timings for every multiplier and see if there's a difference? Or even go the extra mile and make Barton/Thoroughbred bios and tweak the most used multipliers, e.g. who runs his high-clocking Barton at 6x multi? You normally use from 10 to 12.5 and as high FSB as possible. Then make another bios for older CPUs where hight FSB is not that common and tighten the timings for better scores instead. Higher multipliers than 12.5 map to the lower ones, so maybe they are using inefficient tables and can really optimize e.g. 259x13.5 if the tables are right and I could get much better score than what I have currently with the XP-M 2500+ at 3500MHz. PS: I now remember what's wrong with the modded AN7. Somehow the thermal sensor thinks new CPUs (Thoroughbred, Barton) are overheating and refuses to start, while it works for older, e.g. Morgan core, and alsways shows 0 degrees for them. So I need to somehow disable/bypass the temp sensor and then will be good.

ED tables from latest DFI official bios, cpu interface on, BPL 3.19, Barton 2500+. EB/ED is almost the same, except the latency is a little higher. Haven't tested other multipliers though. Do you have your HAL set to "Standard PC"? I also have modded PSU with adjustable 3.3V rail and feed the DRAM directly from it on the modded boards. Going to mod the boards first, then test other BPLs and maybe romsips.

I'm currently limited by the vNB or VDIMM voltage on the unmodded AN7, because all modded bioses can boot 250. Unfortunately, the modded AN7 seems to be dead (90 post code). It acts like there's no bios chip, while it is perfectly fine - tested on the working board. I've revived it before, but don't remember how. So I will have to mod this AN7 tomorrow, then see if there's a difference in max stable FSB. If only we knew what all these timings correspond to...

I believe it was because I generated the password from KeePass built-in tool and it contained too many special characters

Thanks, account back to normal.

I've tested it already. Offset 68 = DD is no boot at 250MHz on my unmodded AN7. When set to 66 it boots no problem - everything else the same. And yes, that's where you change it in the tables. It's not the only difference between both tables, but I'm not sure which one is better. I wonder what are these at the first line of each table. Abit stock bioses always have C0 C0 C0 C0 in the first table, then 10 10 10 10, 14 14 14 14 and 18 18 18 18. Some modded romsips have 0C 10 14 14 for all tables, some 18 18 18 18 for all. PS: Running AIDA doesn't give me significant differences between different romsips. At 10x200 it's about 3098/3147/3098/80.9ns

Just to help you out a bit, I've made 3 batch files (for my AN7 bios). You can adapt to your bios. Saves a ton of time once done for the bios you're working on. First, run cbrom bios.bin /d to see all the modules, so you can adjust the commands. Extract all (extract.bat) Extract all modules without altering the bios file itself cbrom %1 /xgroup extract awardext.rom cbrom %1 /acpi extract ACPITBL.BIN cbrom %1 /epa extract AwardBmp.bmp cbrom %1 /ygroup extract awardeyt.rom cbrom %1 /group0 extract _EN_CODE.BIN cbrom %1 /oem0 extract BSMICODE.BIN echo 1 | cbrom %1 /vga extract NV1ABIOS.ROM echo a | cbrom %1 /pci extract NVPXES.NIC echo b | cbrom %1 /pci extract 4402.bin cbrom %1 /logo extract AN7-256n.bmp Release all (release.bat) This will release all the modules and you will be left with the system bios only cbrom %1 /xgroup release cbrom %1 /acpi release cbrom %1 /epa release cbrom %1 /ygroup release cbrom %1 /group0 release cbrom %1 /oem0 release echo 1 | cbrom %1 /vga release echo a | cbrom %1 /pci release echo b | cbrom %1 /pci release cbrom %1 /logo release Compile (compile.bat) Insert back the modules cbrom %1 /xgroup awardext.rom cbrom %1 /acpi ACPITBL.BIN cbrom %1 /epa AwardBmp.bmp cbrom %1 /ygroup awardeyt.rom cbrom %1 /group0 _EN_CODE.BIN cbrom %1 /oem0 BSMICODE.BIN echo 1 | cbrom %1 /vga NV1ABIOS.ROM echo a | cbrom %1 /pci NVPXES.NIC echo b | cbrom %1 /pci 4402.bin cbrom %1 /logo AN7-256n.bmp All batch files accept just one parameter - the bios file name, e.g. extract AN7.bin

b0d0f3 means bus 0, device 0, function 3. It is DRAM Controller, but what are these bits setting exactly I can't tell without a documentation. PS: These are all modded bioses, I have the archive, but don't have official/beta bioses from DFI/Oskar Wu. Edit: This is the archive that has most Ultra-B bioses: http://www.lejabeach.com/DFI/BIOS/dfiultrabbios.html

Doesn't work for me on AN7. On unmodded board with my modded bios 66 is set to F7, 68 is 66. Setting both to C7 leads to BSOD when I try to set 245->250. However, setting 66 to 66 and leaving 68 by default (66) allowed me to set 255+ no problem. Does anyone have socket A bios and kernel development document? Also, is there any archive with stock DFI bioses?

Hello everyone! Long story short, someone developed an app called AsusZenStates, originally meant to give the user control over P-States on first gen Zen CPUs, with some additional options. It was ASUS motherboards only. However, he doesn't support it anymore and made it open-source. I've made an own fork and now trying to support it for all Ryzen generations and for all motherboard vendors. Since Zen2 launch things have changed significantly in the way some things are controlled through the SMU and MSRs. The lack of meaningful public documentation from AMD side makes it really difficult, especially for a person like me. I'm a front-end developer and don't have much experience with C#, let alone bios development for desktop, although I've had some personal projects for android kernels and co. So I'm trying to do my best, but all I've done so far is mostly reverse-engineered. I still haven't figured out how to control PBO limits (perhaps scalar doesn't work with all motherboards either), so some of the controls are currently disabled. "SMU Power Limits" is also blocked by AMD (the command to disable the feature gets blocked), so this control is disabled as well. Additionally most of the things are SMU/AGESA version and CPU gen dependant, so there might be some logic errors in the code regarding this. I've quickly made a small website, which fetches currently released version. If someone is willing to help with the development and testing, please let me know. Download the app and test it (VID control only works if you use Auto or Offset mode for voltage, but that's to be expected). I will later write a little more info about different CPU generations and features available. Unfortunately I only have access to Ryzen 5 3600 and Ryzen 7 1800X with Crosshair VI Hero (X370) and Asrock B350 K4 (B350). In order to test other combinations I would need to burn more money and buy a Zen+ CPU and next gen motherboards. There are also differences between different vendors. Download: https://zenstates.protonrom.com/ Source: https://github.com/irusanov/ZenStates Current version: 0.8.0-beta3 PS: Also, if someone needs the source of the simple "website", feel free to request it. It's IE-friendly, uses bootstrap for the layout and I've setup a nodejs project for it to automate the build process with sass to css compilation, js transpiling and optimizations.

Btw, DFI Ultra-B/Infinity bioses have 10 tables, not 6 like the rest of the boards. I don't know why. PS: Looking at one of my romsips, I've copied the 200 table to all other 5. This is how the "soft L12" mod is done. Using the same table also means cpu disabled will be the same as enabled. I always use enabled, but it's maybe a good idea to have them 3 by 3, so cpu disabled remains functional.

Yes, based on the filenames I've used EB_ED for AN7 and ED for NF7, however I remember trying some custom tables as well. I think the best approach would be start from scratch, test which is the best bios for ultra-b, then get the romsip tables and bpl. I will search for my files and tell you how to make 2T bios. I remember saving a screenshot of the hex changes needed. PS: I've probably used customized ED tables, but not 100% sure. Here's the BPL (3.02) 2T screenshot I have: My bioses shouldn't be taken as the single source of truth You can probably make a better mod and get better results. That's what I've accomplished by testing many combinations for stability and efficiency on my boards, which doesn't mean is the best possible one. I've also never made a bios variant for maximum FSB with poor efficiency, so this might be an interesting thing to explore. I've done 276MHz dual channel "tight" timings, but only for validation/screen, however my AN7 is unstable above 268MHz for benchmarks. Have to try if the registers @TerraRaptor shared, would help with stability above this FSB. Edit: I also have the SATA/RAID ROM updated to the latest 4.4.02, but usually use a IDE->SATA external adaptor.

I remember using windows 7 or xp for the task, but it was long time ago. Have the modbin, cbrom and various extracted bpl and romsips somewhere on a hdd. PS: I believe I've used second method from the XS link.

Very nice. Next week I will be off from work and will try it on AN7, however it already does 268MHz tight, so it might not have the desired effect.

Thanks. Have you checked if those are set differently on other boards? I'm still trying to finish the ZenStates release and then will probably play with K7 and K8 a little. I have DFI Ultra-B, NF7, AN7 - could check on all of them, but it requires some free time.

What helps me for stability is modded 3.3V PSU rail and HAL set to "Standard PC". Of course modded bios is a must. Most of my boards don't scale much above 2-2.1V vdd and very often higher voltage hinders the stability. I even have one NF7 that can't do 250+ stable if the vdd is higher than 1.8V. Interested to see if you know something else PS: Try a locked XP 2500+ if you have one. It's cool to beat unlocked CPUs, just because you run much higher FSB Edit: Ah, you have one.

550 is C2, 555 is C3. There's quite a difference in how both overclock.

I've bought previous Geekbench versions, but I'd rather support Mat than buying the same benchmark again for the third time.

It's Windsor-F2, not F3.

Meaningful MSRs on AMD usually start from C0000xxx, C0010xxx and C0011xxx. DCT0 is bus0/dev0/func2 registers from 040 to 04C, DCT1 is 140 to 14C Low timing registers are F2x[1,0 ]88 and high timing registers are 8C. There are also 90 to A0. You would probably need to set DCT0 only and it will sync to DCT1. Not sure if any of those would be helpful, since it requires studying the BKDG for family 11h 10h and I guess most things are already covered by MemSet and bios. But it possible to have something that is not exposed and can be tightened further, especially the NB registers. I am currently busy with Ryzen, but might play with K8 later. PS: I was looking at 11h, 0Fh is a little different, but addresses should be similar.

Very nice! DFI is not the most efficient board out there. For example, 790X-UD3P is faster. Interested to know how much have you gained with manual registers tweak (if you have used any).

Definitely a very good one! It's not that easy to get this Mem frequency together with the core clock on the FSB limit. You have a good CPU, great sub!

@GRIFF AN7: https://drive.google.com/open?id=0ByfNThxT1gbTVFR5R3RrVXNRRFE NF7-S: https://drive.google.com/drive/folders/0ByfNThxT1gbTaTFYTUg1a3p6VFk?usp=sharing They are nothing special, just based on the latest official bioses available for both boards and made from scratch with some personal tests of different ROMSIP tables. I've chosen the tables that worked best for me in terms of performance and highest FSB, but this doesn't mean it is the best possible combination. They won't magically clock the FSB 10MHz higher compared to e.g. Merlin's bios Ah, maybe some of you don't know, but I will share a trick I'm using with socket A and was keeping for myself all these years. I guess many of you might know it, but... change the CPU to Standard PC to gain stability with high FSB/voltage.