Obijuan83 - Pentium III 450Mhz (Katmai) @ 675MHz - 2min 52sec 498ms SuperPi - 1M

[Obijuan83]

Limit of motherboard @150FSB, pin mod 2.8v

[TASOS]

  On 5/26/2021 at 9:07 AM, Obijuan83 said:

Limit of motherboard @150FSB, pin mod 2.8v

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Yeah

That board with the HIP voltage regulator , did NOT have the easy mod of the FB sense pin (we perform in common cases).

As for the 150FSB limit ... TurboPLL only , area.

http://www.ne.jp/asahi/simanto/oc/_borders/controller_1.jpg

[Obijuan83]

Thanks for the TurboPLL case, its very intresting but no time to spend at this!

Waiting for an Abit BF6 and an BE6-II so will have the FSB I want.

Thanks again chief!

[Antinomy]

  On 5/28/2021 at 6:23 PM, Obijuan83 said:

Waiting for an Abit BF6 and an BE6-II so will have the FSB I want.

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Excellent choice. They are voltage limited to +0.4V IIRC, but this can be fixed with a BIOS mod.

[Mr.Scott]

  On 5/28/2021 at 9:46 PM, Antinomy said:

They are voltage limited to +0.4V IIRC, but this can be fixed with a BIOS mod.

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Link to modded bios for BE6-II ? 

[Antinomy]

  On 5/28/2021 at 9:48 PM, Mr.Scott said:

Link to modded bios for BE6-II ?

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I believe it's still on beta on my drives I'll try to clean it up and post. BX133-RAID as well.

[ludek]

Do you jave schematics for turboPLL? I can do it in kiCad. What clocks are needed to be replaced? Cpu clock only or its more sophisticated like clk synchro in a proper ratio cpu:ram:agp:pci:usb and so on? Does anyone dig in this technical flavours? Is it only compatible with for example only pentium3 and p2?

[Antinomy]

  On 5/29/2021 at 7:07 AM, ludek said:

What clocks are needed to be replaced?

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You replace the input frequency of 14.318MHz that goes to PLL with a custom one. This shifts all the clocks from the PLL. Breaking the timer, USB, floppy. Thus, you need to provide stock 14.318 (system timer), 24MHz (floppy?) and 48MHz (USB) as well to maintain these while other frequencies go up.

 

  On 5/29/2021 at 7:07 AM, ludek said:

Cpu clock only or its more sophisticated like clk synchro in a proper ratio cpu:ram:agp:pci:usb and so on?

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You shift only the base clock, the board's PLL does the rest.

 

  On 5/29/2021 at 7:07 AM, ludek said:

Is it only compatible with for example only pentium3 and p2?

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Nope, should work with pretty much any PLL.

[TASOS]

  On 5/29/2021 at 7:56 AM, Antinomy said:

You replace the input frequency of 14.318MHz that goes to PLL with a custom one. This shifts all the clocks from the PLL. Breaking the timer, USB, floppy. Thus, you need to provide stock 14.318 (system timer), 24MHz (floppy?) and 48MHz (USB) as well to maintain these while other frequencies go up.

 

You shift only the base clock, the board's PLL does the rest.

 

Nope, should work with pretty much any PLL.

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True

The pll device the Japanese firm FANATIC was selling back then as PLL01 , would require soldering to certain points , to take care of the different clocks for floppy and usb

For example the P3B-F

 

[moi_kot_lybit_moloko]

  On 5/29/2021 at 7:07 AM, ludek said:

Do you jave schematics for turboPLL? I can do it in kiCad. What clocks are needed to be replaced? Cpu clock only or its more sophisticated like clk synchro in a proper ratio cpu:ram:agp:pci:usb and so on? Does anyone dig in this technical flavours? Is it only compatible with for example only pentium3 and p2?

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http://www.saunalahti.fi/~jukkai/remodeling/remodeling.htm

 

 

[George_o/c]

well done Obi and what an interesting conversation your score sparked