September 16, 201312 yr Odd choice of memory divider. In my testing, 3:10 > 1:4 > 3:14 for memory performance (http://forum.hwbot.org/showpost.php?p=136877&postcount=37)
September 16, 201312 yr Odd choice of memory divider. In my testing, 3:10 > 1:4 > 3:14 for memory performance (http://forum.hwbot.org/showpost.php?p=136877&postcount=37) I calibrate the RdPtrInit etc values by hand. There is no difference in performance after that. The different DRAM Pll Multiplier + Divider combinations result different duty cycles, however they do not have effect on performance. Besides, my PSCs (the PCB) was damaged after running on UP4. It is not a very good idea to extract the modules when they are frozen solid into the slot... Previously DDR-2666 with 9-11-8 timings was not a issue, now around DDR-2500 is the maximum.
October 1, 201312 yr An outstanding run - I hope you get to the 9.30 mark first as in my view you certainly deserve it. I agree with your statement (on another forum) that frequency of the memories plays far higher a role than uber tight ones. Even on single channel. You have inspired many past AMD benchers to return to the benching tables and give AMD another go and for that I thank you.
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