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The Stilt's AMD "Extreme" Tools Collection


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It might just be easier to have one thread with all the (extreme) tools The Stilt has made for AMD.

 

THE LIST OF SOFTWARE

  1. APU Fuse Interpreter ("AFI"), latest version: R1.02
  2. BullDozer Conditioner ("BDC), latest version: R1.0.3B
  3. Devastator PowerTune ("DPT"), latest version: R1.00 (unzip with 7-zip)
  4. Trinity Control Interface K2 ("TCI K²"), latest version: V1.1

 

THE DETAILS

 

1) APU Fuse Interpreter

Original post: http://forum.hwbot.org/showthread.php?t=86930

 

Abbreviations:
  • "Leakage Scalar" - A part specific reference value for leakage behavior (ILC).
  • "DSTT" - Dielectric Strike-Through Threshold. *

All of the values are part specific and based on actual production data. The program supports all desktop (i.e FM2) Trinity & Richland APUs. NPUs are not supported at the moment.

 

The voltage displayed in the DSTT field is not an absolute limit.

It should be used for reference only. The voltage is the highest "safe" (long term) voltage level in that temperature. The voltage can be exceeded for a short periods of time, however silicon level damage can occur.

 

Pressing "Copy Hash" button will copy the displayed hash-string to clipboard.

 

In case the UAC is enabled (Vista / 7 / 8) please run the program as admin.

 

Changelog

  • R1.02
    • Fixed the issues with Trinity APUs
    • Fixed the faulty PState7 frequency reading
    • Added support for the new Richland APUs / NPUs ("20"-series, K-series)

    [*]R1.01

    • Added support for FM2 NPUs (Athlon & Sempron)
    • All FM2 socket APU/NPUs are now supported (excl. FirePro)

    [*]R1.00

    • First release

 

2) BullDozer Conditioner

Original post: http://forum.hwbot.org/showthread.php?t=78490

 

Supported OS: Windows XP / Windows Vista / Windows 7 / Windows 8* (32 & 64-bit) (* Not tested)

 

The x86 version works in both 32 & 64-bit operating systems, while the x64 version is 64-bit only. The functionality itself is identical between the versions. Known limitations: Up to 16 CUs (32 cores) supported at the moment. Support for 32CUs (64 cores) will be added in the next version.

 

Also the R1.00B (Beta) version does not contain the feature to patch the microcode block as I could not make it work stable enough.

 

The "Errata Fix" button will fix the major errata which can be patched without updating the microcode. This feature should not be used as a permanent solution, the bios update should still be used as a primary method (updated AGESA + microcode).

 

Notes:

  • Enabling "Zambezi Stack Special (PD)" feature might cause undefined behavior, however each user should test it's functionality on their own. Some applications might indicate a minor r.e.t.a.r.d.a.tion (god damn "specialbunnyaction") in performance, however SuperPI for example receives a nice boost.
  • "x87 instruction (NRAC) block" -> Enabled means that the instruction is blocked (default on all 15h family APU/CPU/NPUs). Disabling it make the SuperPI "a bit" faster.

 

Changelog

 

V1.02B: original post

  • Enhanced the NRAC fix
  • Added a UAC prompt (admin rights) for Windows Vista / 7 & 8.
  • Updated the AGESA version info

 

V1.01B: original post

  • Added a hardware flag to indicate that the errata has been fixed.
  • Changed the way how the software is accessing the cores, the tasks are completed quicker than before
  • An APU specific bug fixed
  • Added information about the most recent microcode and AGESA versions under Info menu.
  • Some small changes to the GUI

 

V1.00B: original post

  • Initial release

 

3) Devastator PowerTune

  • R1.00 (unzip with 7-zip)

Original post: http://forum.hwbot.org/showpost.php?p=269267&postcount=48

 

The BApm controls all of the Dpms (dynamic power management) on 15h APUs. There are different Dpms for NCLK (NB), SCLK (GPU), LCLK (Link), DCLK (Display), VCLK and few different Dpms for the UVD clocks too. If the BApm is disabled you will loose all of those Dpms. No Dpm (PState) change can occur after that. This includes both the clocks and the voltage.

 

The software will configure the Dpms prior disabling the BApm in a way that there will be no performance impact. For NCLK Dpm for example it will determine the highest performance resulting PState and lock the NBPll to that frequency prior disabling the BApm. After the BApm has been disabled no frequency change can occur (other than CPUPll & GPUPll, i.e frequency).

 

As the NCLK PState (and frequency) is tied to the GPU activity it is continously varying. In case the BApm would be disabled directly, the NCLK could lock into a low performance (frequency) state, which naturally would cause a performance impact.

 

Notes:

  • In case the display driver crashes and is recovered the BApm needs to be disabled again
  • Running simultaneously with CPU-Z or HWMonitor might cause a system crash.
  • All of the changes will be overwritten by a reset
  • Unlocking the NCLK frequency might require a cold reset
  • The NCLK frequency cannot be changed in flight (e.g with PSCheck) after BApm has been disabled
  • In case your are already running at critical UNB voltage levels (1.55V or above), do note that disabling BApm sometimes results a 25mV increase in the GPU voltage.

It is tested on Catalyst 13.9 WHQL and on 13.10 Beta 2 drivers.

AMD has changed and might change again the behavior of BApm in different driver versions, so the fix might not work on future or older drivers.

 

4) Trinity Control Interface K2

Original post: http://forum.hwbot.org/showthread.php?t=59243

 

Requirements

  • AMD A6-5400K / A8-5600K or A10-5800K APU
  • Integrated GPU enabled (Dual Graphics / discrete with Virtu allowed).
  • Windows Vista or Windows 7 (32/64-bit)
  • NOTE: AOD or GPU-Z CANNOT BE RUNNING while the program is started or any of the settings is being adjusted.

Getting started

 

Start the program by executing TCIK2.exe

 

If it is the first time you run the program, it is necessary to select the correct profile for your motherboard. It is ABSOLUTELY MANDATORY to select the correct profile. Selecting a wrong profile can cause permanent damage to the hardware (such as corrupted VRM controller NVM). Even in the best case the behavior would be completely unpredictable.

 

NOTE: If you accidentally select a wrong profile or use a different motherboard with the same OS installation:

 

Start the program and wait until the main menu is displayed. Type command ***8220;Profile***8221; and press enter. The program will move to the initial menu which allows reloading the motherboard profile. After you have changed the profile to the correct one, restart the program as requested.

 

Currently there is only a very limited amount of profiles available. More motherboard specific profiles will be added once the hardware specifications of the currently unsupported motherboards are confirmed.

 

If your motherboard is not listed yet, please select the generic profile (6. Other). This will load a safe profile which does not support any external clockgenerator or any specific VRM controller. The generic profile will only support BCLK adjustment in internal clock mode (FCH integrated Pll).

Edited by Massman
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Regarding BDC, OP will surely deliver, let´s just wait...

Finished some larger projects recently so I could not find enough time to do this earlier.

 

BDC R1.03B

 

- Added support for Steamroller; Kaveri (KV-A1) & Via Drago (VD-A1).

 

Steamroller only requires setting DSWS to enabled.

It will slightly improve the performance in SuperPI depending on the digits used.

 

Validated on Kaveri and Via Drago with the latest code base (Patch, SMU, PMU & ScS only).

 

Some of the lesser AV will flag this SW as malware, but as long as you only use the original package you´re safe.

 

https://www.virustotal.com/fi/file/a00004302efbf4779c358b86e9ec66b8b8ed53304797627e42e50caa26a4f3f6/analysis/1426595828/

 

The checksum of the original package is DA817FFBCAFCE8C42702E4052A69FC81 (MD5).

In case the checksum differs discard the archive and re-download from another source.

 

http://1drv.ms/1EsKd0c

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It´s just a very minor improvement, around 2% in 32M.

The main issue was fixed in SR/XV design so further optimizations only yield a minor boost.

 

There might be some additional stuff coming to adress the NB-DRAM FIFO latency issue, but I cannot guarantee I find the time to do it.

The fix is highly configuration dependent and therefore pretty damn time consuming to implement.

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