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Everything posted by I.nfraR.ed
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Mr. Iridium - Ryzen 9 7950X @ 5500MHz - 16218 cb Cinebench - R20
I.nfraR.ed replied to flanker's topic in Result Discussions
I am very sceptical about AIO, air and "normal" water during winter :) -
@GorodJust lucky with the IMC, I think. Max I've been able to run so far is 7400 (on LN2 though). It could always be some MSI magic, but I doubt it.
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A little improvement 6GHz https://hwbot.org/submission/5178335_i.nfrar.ed_superpi___32m_ryzen_9_7950x_4min_45sec_747ms 5GHz https://hwbot.org/submission/5178336_i.nfrar.ed_superpi___32m_ryzen_9_7950x_5min_38sec_598ms
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safedisk - Ryzen 9 7950X @ 6067MHz - 14sec 270ms y-cruncher - Pi-1b
I.nfraR.ed replied to Seby's topic in Result Discussions
Excellent! I knew it was possible sub 14.300 with similar settings, just had no time to try more. Next time, 7600+ -
Excellent score! You got the same bug with bclk showing as ~98.6? My bios almost committed suicide after that happened, wiped all its profiles and settings, had to start from scratch and it worked afterwards. Also, at some point, I could see all cores, but the scores (dropped in half) were like the second CCD is not there at all.
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Yeah, I can change it in OS as well, although not much with a board without extra external PLL, but asked because of all the "unreliable/skewed" stuff in Benchmate. What is the difference in memclock compared to ambinent if you have tested? IMC seems to scale quite nicely with cold, but I'm unable to post at over 2200 fclk strap and haven't seen any other result with higher fclk - I think that's the limiting factor for (much) better scores. I can almost train 7000 on the chiller, would probably be ok on LN2. And...do you know when the Tachyon will be available in Germany? That's the only board I'm interested in right now. FYI: I've tested 100 -> 100.50 in OS (internal CPU PLL) and benchmate spits the same unreliable/skewed stuff, although QPC is still displayed as Reliable. I think hwinfo does not detect the bclk correctly as it seems to use the Zen3 algorithm, however it seems to be different on Zen4, e.g. if I set 100.25 with my app, cpuz reports 100.50, while something like 100.1250 is not reflected. Either the granularity is different or there's more in it as the bios allows intermediate values. Need to investigate it, but overall bclk detection on Zen is PITA.
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6800 is only possible on the chiller (most probably colder, too). 2200 FCLK is where it ends for me, the next multi doesn't even post. 6800 is TM5 stable at these settings, but it is hard to POST with a box cooler. Seems to be limited to 6600 on air. 7000 doesn't POST no matter what, maybe on LN2, but haven't tried with this kit. Too bad I could not solve the -110 CB on this CPU. I'd appreaciate if someone has an idea what I'm doing wrong and want to share some insights. I've only tried one Zen4 on LN2, so I don't have anything to compare with. Maybe it's the chip, but with just 20L it is hard to troubleshoot. PS: Asus tool shows 116/110 (CCD0/CCD1) for this CPU on defaults loaded, althought I've seen it show different values. There's around 50MHz difference in OC capabilities between both CCDs. Best core is 118 SP.
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1:1 is always preferred, but there are other dividers that work, just not on every FSB, you have to find a working combination. There's a PCI lock, so no matter the FSB you have AGP and PCI locked and you can control the PCI bus frequency independently from the FSB. Some of the dividers boot (e.g. lower memory compared to FSB), but they work up to 220 and then you need to clock in Windows. This is how the records are achieved, although I think it would be possible to use TCCD for 1:1. https://hwbot.org/hardware/chipset/nforce2_ultra_400/ There's also an "auto validation bot" in the tweaker, which you can let validate the FSB for you at least for the preliminary testing, then maybe try manually for the last extra MHz, however in my testing the auto bot was able to beat me and validate higher . It can only validate higher FSB, but I can add the opposite direction too (downclocking). You would probably need to tweak the registers though and you definitely need mod bios. My tweaker is not necessarily the best tool for the job, it has a better granularity than Clockgen, but there might be things I don't know, since most of the PLL work done for the tweaker is reverse engineering and "trial and error" method, due to lack of documentation. Luckily there is a linux driver for the PLL I was able to port and extend for my needs. PS: This, for example, has the memory higher than the FSB: https://hwbot.org/submission/2557243 You probably need a 2T bios for TCCD to work at this frequency on NF2 (don't quote me on that though). This is the current record on s.A, I still haven't found the time to try and replicate it: https://hwbot.org/submission/2640212_stelaras_memory_frequency_ddr_sd_ram_305.7_mhz Everybody thought 300.7 was the hard limit, but Greek guys found a way to lift that limit. This platform is my all-time favorite, maybe it helps that my first PC I bought with my own money was socket A based
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I had it beaten on chiller already, so this gen seems a little bit faster, but not by much. If my efficiency is not too bad, then one would need 7200+ for sub 4 min on AMD, perhaps it's possible with some of the CPUs of the top guys. I'm not sure how big is the difference between validation and Pi as ZenStates was limited to 70x max multi and I hit that pretty easily Got beaten by my own tools, but I will try again next time. 74x seems to be the highest supported multi according to AMD's RyzenMaster. PS: First one on the bot has 74.75, so maybe 74 is not the max - I don't really know.
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I have removed the lower limit. The steps will be stupidly small (0.05MHz), but hopefully it works. I'm not sure what is the lowest supported frequency by the integrated PLL in nForce2, but you can try. Lowest multi should be 3x, but not sure on which generation. https://github.com/torvalds/linux/blob/4cee37b3a4e68c42b867c87a6218e11bc571ba66/drivers/cpufreq/powernow-k7.c#L78 NForce2Xtreme-v1.1-beta19-mod.zip
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It's not possible to change memory timings runtime (within Windows) on AMD AM4/AM5 systems. Userspace programs don't have the privilege level and although you can write the value in the register, it does not get applied. It it was possible, I would have added that functionality into ZenTimings.
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I can run 6600, but not for y-cruncher, at least not with "tight" timings. Seems to be limited by the locked mem voltage, the cheaper memory (?) and the score probably should be better if I had tREFI. Maybe the controller is to blame at 6600 for y-cruncher, but I could not get it to run reliably. I have nothing to compare with, just one of each - cpu, motherboard and memory kit. The CPU looks like a good one with very small difference between both CCDs - around 50MHz, maybe good for MT benches. Not sure how common is that for this gen, the difference was usually larger for previous gen. Will have to see what it does with LN2.
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Didn't have mich time. This combination was giving me best results in 7zip. DRAM voltage is limited and the board has only one bios. Don't think I can tighten timings much more at 6000.