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sin0822

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Everything posted by sin0822

  1. after f5f or somthing the font changed, and f5g the post display changed. Two things make it go a bit wild, first is if you try to disable the POST screen. I also got that odd reboot thing get rid of it with posting 15 over and over, to get rid of it i shut down the PSU and back again and it went right into BIOS, then you need to load optimized. You should reflash and after the flash clear the CMOS, go back in and load optimized defaults and save and exit, this will help a lot. be aware, f5m and f5n aren't as validated as other BIOSes, so flash wisely.
  2. leeg- i think there is a setting needed for 2800c11 samsung from corsair, i can't remember what its call taonad or something off the top of my head. It might be for cas 12 tho, i don't have that kit. hicookie said it would be in public BIOS soon, it is nice of them to add that slew rate across all boards, i just noticed even this Z77X-UP4 has it now. Hey zen- here are my results with the same kingston kit: but i remember it working once we got into the F5 BIOSes, even without slew i can get boot at XMP, i didn't have time to test stability at that, but i wouldn't be surprised if it required a change in slew to be, if that is the case they might be able to program certain kits to do different slew by default, or at least i hope. max clock was around 2900(max of my CPU, 3 kits all hit this). this was my All these results on slew 2, but the strength of the slews seems to change BIOS to BIOS.
  3. well maybe you are referring to someone else b/c i never told anyone it is their fault. Plus i don't work for gigabyte.
  4. F5n: http://dl.dropbox.com/u/66364457/Gigabyte%20UP7%20bios/z77xup7F5N.zip it is F5m(which is f5j but with higher vcore) with fixed ddr multi
  5. I am not kidding.
  6. you know i will sue you in your own country if you don't stop calling me a staff member. This is a public proper warning, the last one, and a formal one. If you persist when I will be left with no choice but to write more asrock reviews.
  7. Let me test this for you, XMp worked fine on this kit, but i think I also suspect maybe it wont pass 32m. I gotta try it out when i toss the Up7back ont he bench. I am super busy these past few days, and I go on a long vacation tomorrow.
  8. he should change it to 32 phase human because he really is amazing posting BIOses everywhere, I don't even think i could keep up with that. Yea its the same issue as with some test BIOSes i get where the DRAM multipliers don't work, usually happens with BIOSes that have no validation and are just to change something. A power cycle is very important, that is one reason after F6X for the Up5 the BIOS engineer put in a mandatory power cycle, but he told me to always shut down the PSU and clear CMOS after every BIOS flash, and it fixed an issue on an early version of F6X where the multipliers and voltage wouldn't work for dram, other slot might work too. He also changed some things in that F6X for the UP5 for stasio, but after that it didn't get into the final versions of the BIOSes, he said something about how if a user or XMP picks a higher DRAM multiplier, i think 2666+ CR will be set to 2 automatically and DRAM voltage will be increased. This isn't that odd as both the M5E and OCF increase VTT/SA voltages when you goto higher dram multipliers, but yea its not increasing DRAm multiplier.
  9. the Kingston 2666C11 you mean? Sure I will make a video too. lol. With F5J i just tested.
  10. i have an asus laptop, i gave it to my parents.
  11. that is what skype gave me as my username, i only have MSN, and i downloaded skype and it says i can login with my MSn info.
  12. yea the dram multipliers aren't working on F5m.
  13. hey zen, did you do a power cycle? it is now required, and if you don't it messes with a few things. Ill try out F5M to see if I have that issue with the dividers too. F5M isn't a progression of anything other than F5j with extra vcore, that is all it is supposed to be.
  14. s.bassiri_1
  15. okay yea F3OC works good for Ln2. What are your issues?
  16. UD4H(memory OC is very good) And you can bench it. But it isn't out yet. M5G is good, but I am not sure if it was like M5E, but my M5E lacked any sort of memory OC recovery(really damn annoying, and what is worse is no one publicly talked about it, like asus was breaking their balls) Some guys told me to just flip the power supply switch, they said on the M5G that is what they do and it will allow you back into the UEFI, but on the M5E that didn't work.
  17. F15M? For the UP7? Leeghoofd, have you tried it on the UP7?
  18. Ill post an OC guide for this board including memory in there too, you can use that Leeghoofd if you don't want to explore the board for yourself. CPU OC works very well, if you don't want to have EIST enabled for OC Touch, then you can use my methods above, i know it works for F3OC. I did Ln2 OC with it, it worked just fine, not many issues. Just make sure to change from dual BIOS to single BIOS mode, oh and if your ratio is stuck at 16x, check the Ln2 switch. I asked for an LN2 BIOS with the Slew rates btw(I am waiting for a version that can be put into public), but if you are OCing hynix or something then you can just use F3 BIOS. If you really don't want to use it, use a UD4H instead.
  19. Because of where the clock generator is, GTL uses ICCS driver Integrated Clock Controller Service, Ivy has clock generator built into the CPU. For the UP7 is you want OC touch to work with Ivy, what i do is I go into GTL after making sure ME, OC Touch, and GTl are properly installed, and then i change the multiplier 1x up or down and then that allows me to use OC touch for multiplier with Ivy Bridge. You can even close GTL after you change the multi, you just need GTl to initialize ICCS driver I believe. I made a video:
  20. zeneffect- that is the predator 2666C11 right? I have that kit without issues with XMP.
  21. ye its like a thing with the tridentX, they will cut you if you don't respect them lol. I got some major porn coming.
  22. where is the original thread anyways? hardforum?
  23. you are talking about S3 and CPu PLL overvoltage?
  24. stole some LN2 from the graphene lab, yay, next time ima grab some of that lHE if they let me:
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