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What tWCL are you running?

I will check later if everything with the frequency is correct, maybe make a video too.

I'm gaining (at least) 2 seconds from wazza. XP is tweaked like I always do for 32M.

I can't run 1300MHz at all. Not sure if the board or IMC.

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  • l0ud_sil3nc3
    l0ud_sil3nc3

    Because AMD makes every generation of architecture slower on 32m to torture 2D benchers lol   22 minutes is a long time to wait for pi to finish.

What tWCL are you running?

I will check later if everything with the frequency is correct, maybe make a video too.

I'm gaining (at least) 2 seconds from wazza. XP is tweaked like I always do for 32M.

I can't run 1300MHz at all. Not sure if the board or IMC.

 

tCWL 5, 6, 7.

7 MEMCLKs appears to be the fastest.

The difference is barely noticeable <0.1 sec.

 

I´ll try on Gigabyte next time.

There might be some differences in DRAM-NB calibrations, but nothing which could explain the difference.

Edited by The Stilt

Video 1 - The end of a normal run, slightly slower than my previous results.

Btw I have 18:400 somewhere on the ssd.

Not sure if you can see something. Had to compress both videos and Youtube compressed them further.

This video also shows that "One does not simply restart a Gigabyte board" :D

 

 

 

Video 2 - full run, bad wazza and cpuz opened all the time. 3 seconds slower.

 

Damn it. Just realized that the videos are not correct. I'm running Pi on second core from the first module and I didn't show its frequency. This means another video... :D

No need for the videos, I never thought you would be cheating intentionally.

 

Found one of the reasons why my time was so slow.

On XP you'll just never ever - ever never disable the "Luna" theme.

It is over four seconds faster than the Classic theme. A quite "nice" glitch.

 

Still, I am atleast five seconds slower than I should be.

The DRAM/NB timings have been tweaked as far as they go, the adjustment range has been literally exhausted. Cannot go any tighter.

 

Still need to check something.

I noticed that Gigabyte does not enable the "CLK Mux".

I certainly hope this is not done on purpose, yet I would not be too surprised...

 

http://www.hwbot.org/submission/2386335_the_stilt_superpi___32m_a10_5800k_18min_14sec_718ms

 

971440.jpg

Is the limit still the same on LN2? I've never used more than 1.4V on LN2, because it didn't seem to help with NCLK.

 

On LN2 you can do 1.6 - 1.65V, depending on the leakage.

At 1.7V or beyond the NB gets damaged (GPU first then the rest of it).

 

Any chance you could upload the F3I bios for UP4?

I have all of the other alphabets besides that.

Yes, here it is: https://dl.dropboxusercontent.com/u/30576042/2A85XUP4.F3i

I have it from the last CountryCup. Noticed other guys were running that version, but we couldn't find it anywhere, so I asked Massman and he was nice to share it.

Honestly I didn't see any difference in performance.

 

By the way, I don't even know what is CLK Mux and what it is related with :D

Edited by I.nfraR.ed

Thanks for the bios.

There is no difference in SuperPI performance between F2A85-V PRO and F2A85X-UP4, the times were within the margin of error.

 

The CLK Mux feature is PLL related.

There are two PLLs on F2A85-V PRO and F2A85X-UP4 which can be used to generate the BCLK frequency.

One is located inside the FCH (Internal PLL) and the second one is the external located between the PCI-E slots.

 

Even the F2A85X-UP4 features an external digital PLL, for some reason Gigabyte does not use it for BCLK until the adjustment range of the internal PLL has been exhausted (136MHz BCLK). I've asked the reason for this but they never gave me any answer.

 

Asus F2A85-V PRO never uses the internal PLL for the BCLK, only the external.

 

The CLK Mux controls the different frequencies.

Without it enabled the all of the clocks are tied to BCLK.

When enabled the clocks are separated by the mux control.

The PCI-E frequency stays at 100MHz even when the BCLK is raised.

 

I could not test the Gigabyte board above 108MHz BCLK as the board flips out after that when AHCI is enabled.

No such issues on Asus.

Interesting information, thanks.

Yes, I have that issue with UP4. I was able to load Win7 at 111MHz bclk no problem, but with XP @ AHCI I should go down to 105 or so, then raise the bclk from Windows. Had to do the same with Win7 on IDE mode.

So in fact PCI-E frequency is equal to BCLK when Mux not enabled (Gigabyte case)? I've used 120+ BCLK in the past, but don't remeber what sata mode and it was definitely a lower mem divider.

Edited by I.nfraR.ed

Have someone explanation, why Zambezi core is in superpi better than Piledriver core? If in all others is much worse than Piledriver...

Because AMD makes every generation of architecture slower on 32m to torture 2D benchers lol

 

22 minutes is a long time to wait for pi to finish.

Did a run with the Stilt's errata fix and this popped up - Makes a world of difference!

http://www.hwbot.org/submission/2393184_

 

This was better than a sub I have but disabled points for this entry anyway. Note that I used the same settings as the one done before for this challenge.

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I'm around that with lower memclk. 14m25s, but for some reason I'm not able to hit 4G NBclk anymore, since the 8G 1M chip seems to have given up :(

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