June 22, 201311 yr Back again. Some of the users have been asking why the "Errata Fix" feature doesn't work (i.e. "Fix required" stated even after the Fix button has been pressed). The feature itself is working fine, however I forgot to add a check in the GUI. Also some claims that the software is wrong when it states that the microcode is outdated has emerged. So: A small update: Bulldozer Conditioner R1.01B Original package checksum (MD5): C3C4E3492B3FBFE1079AE5D57C25172B Changes: - Added a hardware flag to indicate that the errata has been fixed. - Changed the way how the software is accessing the cores, the tasks are completed quicker than before - An APU specific bug fixed - Added information about the most recent microcode and AGESA versions under Info menu. - Some small changes to the GUI
June 22, 201311 yr Back again. Stilt, can you explain, what exactly your patch is doing? I suppose, you write some values into some MSR's to manage low-level fixes and bug workarounds, that have been inserted in the microcode by the BIOS/AGESA on boot. Switching these off may speed up something, but it's dangerous, if the (originally patched) hardware flaw haven't been fixed yet. And what are this fixes? In particular, that is NRAC, TBM («trailing bit manipulation» instructions?) and Stack Special? Officially, Bulldozer (all steppings and revisions) doesn't have TBM, but Piledriver does.
June 22, 201311 yr The actual technical background is under investigation currently. Until then, I can only speculate and assume: By default a x87 FP instruction is blocked / partially blocked. When the "blockade" is removed (BDC "NRAC": Enabled to Disabled), SuperPI which heavily utilizes this instruction receives a massive boost. It is not a post tape-out workaround. Neither AGESA or µCode control this feature, all of the post tape-out workarounds (errata) are controlled by these two. If it was something that was actually broken, it would have been fixed in Piledriver and beyond. A software doesn't go much more unofficial than BDC does. It should be used for testing purposes ONLY. Obviously it shouldn't be used in systems which can be considered 'critical'.
June 22, 201311 yr By default a x87 FP instruction is blocked / partially blocked. When the "blockade" is removed (BDC "NRAC": Enabled to Disabled), SuperPI which heavily utilizes this instruction receives a massive boost. What instruction? There is no «NRAC» in the original x86 or any of its additions (including x87). Besides, if some code uses any blocked or unavailable instruction, the CPU should generate #UD or other exception. So, it must be either microcode workaround for a HW bug or some other explanation. If it was something that was actually broken, it would have been fixed in Piledriver and beyond. Well, then there is no reason for keeping it that way for 2 core generations, if it just slows things down. And you haven't answered about other fixes in your program.
June 22, 201311 yr Andre, Andre, test your 8800 MHz Vishera chip with this! Or I beat you! Massman:in August I could test it with my 8100 MHz chip. 32M will be interesting. Believe, someone can get under 10min!
June 22, 201311 yr Andre, Andre, test your 8800 MHz Vishera chip with this! Or I beat you! Running SuperPI on LHe is pretty damn expensive. Yes, helium.
June 23, 201311 yr Stilt: And what your 6 GHz "air cooled" chip? There is chance for good result and "only" LN2.
June 23, 201311 yr Stilt: And what your 6 GHz "air cooled" chip? There is chance for good result and "only" LN2. I might try it at some point. 8-8.2GHz (SuperPI 32M) shouldn't be much of a issue with a proper specimen.
June 24, 201311 yr Author I might try it at some point.8-8.2GHz (SuperPI 32M) shouldn't be much of a issue with a proper specimen. Where can we make a donation to cover your LN2 costs for this attempt?
June 25, 201311 yr Author Looks like the story went viral - http://www.techpowerup.com/186056/amd-super-pi-history-to-be-rewritten-courtesy-of-the-stilt.html - http://www.xbitlabs.com/news/cpu/display/20130622092423_Low_Performance_of_AMD_Microprocessors_May_Be_Conditioned_by_Poor_BIOS.html - http://www.hardwarecanucks.com/forum/cpus-motherboards/61801-stilt-releases-bulldozer-conditioner-software-amd-superpi-history-hwbot.html - http://www.overclock.net/t/1402792/hwbot-the-stilt-releases-bulldozer-conditioner-software-amd-superpi-history-to-be-re-written - http://www.eteknix.com/amd-super-pi-performance-fixed-with-patch-benchmark-record-to-be-smashed/ - http://nueda.main.jp/blog/archives/006734.html - http://www.overclockers.com/forums/showthread.php?t=733638 - http://www.techsweden.org/content/nyheter/nytt-optimeringsverktyg-till-amd-bulldozer-f%C3%B6r-r4164 Massive response from the enthusiast community in general. A couple argue that SuperPI is outdated and irrelevant. The former is true, the latter not so much for us. Anyway, good to see so much noise being made about all this. Even if it doesn't make a difference in the future, at least The Stilt gets wider recognition for his hard work!
June 26, 201311 yr A small update: Bulldozer Conditioner R1.02B Original package checksum (MD5): BCC929498EF1B01B7F99B8F2DA805F46 Bulldozer Conditioner R1.02B Mirror: http://downloads.hwbot.org/downloads/tools/BDC_R1.02B.zip Changes: - Enhanced the NRAC fix - Added a UAC prompt (admin rights) for Windows Vista / 7 & 8. - Updated the AGESA version info The enhanced fix included in BDC R1.02B is around 10 seconds faster in SuperPI 32M than the one in R1.00 / R1.01 versions Edited June 26, 201311 yr by Massman add mirror link
June 26, 201311 yr 1048704 will increase with L3 size? No. :celebration: Edited June 26, 201311 yr by GENiEBEN
June 27, 201311 yr Good to see news about it I also sent info to polish computer portals about Stilt's work
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