2.3v input, -113cb just doing some baseline testing as this was the first time to run the bench ever, and wanted to see how everything scaled.
Few more tweaks to implement, will be back with a better chip:)
^yikes indeed!
not bad considering I spent about four hours trying to get it to just run, and all it took was LAN + connection to the internet, nothing else.
Maybe:D
Usually it clearly states in the rules when ES are not allowed, even though it is safe to assume they are usually not allowed, just thought I would clarify here.
You know PJ, I don't have one to test anymore, but I think a lot of it is the improved IMC from the Ivy architecture. Just think of the difference from Sandy to Ivy memory clock wise.
Regardless every IC has been so easy to run in quad channel as long as you have decent kits. Still have BBSE to test but I think 2600 8-11-7-22 should be doable which should be very strong for any 3D benching.
Thanks PJ will give this a spin in a bit and see if it fixes the issue.
edit: No go, still the same thing. Do you think my copy of W7 might have something to do with it?