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XS IvyBridge Superpi32m 5Ghz Challenge, Invitation


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I guess it all comes down to what you define as tweaking. Is messing with memory settings more tweaking than messing with settings related to the core frequency?


Memory also scales with cold, so if avoiding Ln2 subs is a part of it you have to set some memory limits that are fairly easily achievable on air so there is no benfit going from air to LN2. Just my 2 cents.

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Well.... if the limit is adjusted so more than just the cherry chips can compete, may as well do the same for IMC.


If there is a MHz cap, the score comes down to memory and OS, so the golden chips still win... OR.... the average chips go under LN2 to compete.


I'm not whining per-se..... just pointing out the "problem" Is it a competition for OS tweaking and SPi technique.... or a competition to see who has the best IMC & memory?

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