May 12, 201312 yr Author That's because the CPUs were just not capable of running anything near that . Â Maybe they are now ... not sure about this, actually.
May 12, 201312 yr Author The CPUs were just not capable of doing much more than 170MHz BCLK. To fully use the 2.5x ratio, you'd need to use a BCLK of 68MHz with 2.5x gear ratio. Anything below 95MHz BCLK on SB-E was already a struggle.
May 13, 201312 yr but can the PCi-E bus itself not the CPU, i am talking about the GPU go below? Maybe, idk. I have one GPu i used to do that 117mh BCLK, so i guess you can go the other direction, but i always felt it could go up more than down.
May 23, 201312 yr Any new thoughts about "is L3 cache running at core or ring frequency" thing? What would you guys think if core AND ring frequency boost L3 cache performance at a 2/3 (core) and 1/3 (ring) relationship? Wouldn't it be a nice idea that L3-cache runs at core frequency and ringbus only boosts the interface between the cores and the L3-cache? Â Given L3-cache and ring share one clock domain in fact and run at the same frequency - for what reasons would the core frequency affect synthetic L3 performance values much more than the ring frequency or e. g. CPU NB clock frequency of AMD CPUs? Edited May 23, 201312 yr by Hyperhorn
May 23, 201312 yr Author If I recall the IDF presentation correctly, the Intel engineers mentioned that "even though the Ring Bus frequency can be adjusted, they have not seen major performance gains in the labs". And then they asked the reviewers and power users to test it themselves
May 23, 201312 yr Aside from superpi and couple of 2d benchmarks+2001,gains are not so big as you'd expect to,pretty much below 5%....
December 6, 201311 yr can someone plz advise me how to play with rtl-settings on maximus? if i change one setting one step up or down i get 55 no matter what volts.... i get non consistent rtl=changes after reboots on auto and i think this is only setting effecting 3d11mark pysx score.(maybe interesting for massman in x79 pysx). thanks in advance
December 6, 201311 yr lower bclk for instance to 98,6 mhz and try to boot, you have to pass memory training first before going full mhz
December 6, 201311 yr Bascom my way to adjust RTLs @M6E is as follows: 1. Set all RTLs & RTL-IOs to desired values iat the same time. (eg. 39/39/40/40 4/4/4/4 - do not change only one parameter). 2. Start adjusting RTL initial value in small steps from 63 to smth like 40 (63, 61, 59 etc) trying to post/train with a given RTL initial value. Â For my PSC kit @2600 I was able to adjust rtls from 42/42/47/45 4/4/9/7 to 41/41/42/42 4/4/4/4 with RTL initial value of 44. Â I beleive RTL initial value is a key for successful post.
December 6, 201311 yr thx very much xtreme addict. its better then before now,but i am still not able to put values manuell. best score i get is with 39\40\40\41 and this is only sometimes after boots if i am lucky only rtl initial value i can do manuell. Â does more ramvolt help you with lower rtl?-me is not getting lower values. Â thx terraraptor-will try and report. Â ex:my last 3 boots on rtl-auto:39\39\40\41 ; 39\39\40\40 : 39\40\41\40 Â my sys:max6gene 1002-17600cl7 pi-1:9 2424mhz cl8-11-8 Edited December 6, 201311 yr by basco
December 6, 201311 yr thanks a lot Terraraptor & Xtremeaddict with your help i can finally boot with manuell rtl. 2424mhz rtlinit-44 \\ 39\39\40\40
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