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Posted (edited)

Got LN2 and decided to run some cold mem.

BBSE was a bit disappointing but the sticks only just do 2600C8 on air. Full pot & 2.1V:

snap-12.08-08_50.thumb.png.2d67f760983e648ef18b2b5a61cfe46a.pngsnap-12.08-09_45.thumb.png.6e9f7e1ec1844459fad2d252f298b16f.png

Ran my trusty 1600C7 again and finally got into the 17s. Full pot & 2.36V:

snap-12.09-07_54.thumb.png.f132043efbd7bf429ea43e4ecac9e7db.png

20210716_140400.thumb.jpg.ff825314b4bd57e1c8ceb807ee5705af.jpg20210716_140407(0).thumb.jpg.1cba674d8c7ce1751b1822e68e1c48a3.jpg

Edited by Noxinite
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  • 4 weeks later...
Posted (edited)

'Cause I'm just a sucka for cold PSC here's some more.

One stick from the last 1600C7 set and the other from a new 1600C7 kit I got. Better for C6 freq, but worse on RCD so couldn't try 2750 6-9-6 like I wanted. So instead I was at much higher freq with RCD10 (that kills effi even with 3/4 IOLs), also check out that high RAS. :/ Therefore still no bunnyextraction 16s. D;

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image_id_2549937.jpeg

Edited by Noxinite
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  • 3 weeks later...
Posted (edited)
On 1/6/2021 at 10:40 PM, redux said:

I'm not sure if it's because of this IMC or what, but I have had crazy scaling on most sticks, 2V+ easy on all so far and with the right settings even scaling 2.1V+, 2.2V+, and at least booting even 2.3V on some sticks (a mediocre 2000C9 Trident booted 2.33V!), with normal ambients and auto VTTDDR.

Finished binning my PSC a little while ago and I feel I should clarify this -- high voltage scaling on PSC is just a matter of the settings you run. Roughly speaking, running tight but with loose tRCD gives the most voltage headroom. Sticks that take 2.2, 2.3, and even 2.5V are the exception, not the norm (and usually suck anyway :D). I will make a post in more detail at some point.

On 4/21/2021 at 1:23 PM, redux said:

Binning IMC for Samsung (Rev.D) is much much easier. Probably 90% of my chips I tested (all G3258?) passed 2800c9 no problem so I decided it wasn't worth doing.

Quick binning at 2800C9 isn't enough, evidently. I'm currently working on rebinning with my PSC binning chip and, aside from better voltage across the board as is to be expected with a better quality IMC, high frequency (2800++) voltage scaling is dramatically better, 100mV+ lower in some cases versus the poor quality 4670K I used some time ago. Naturally binning stringently is always better (though, you know, having some validation that your goals are realistic is always the problem), I would bet some kind of 2850+, 2900+ metric for IMC binning is a better idea.

(Though, technically, this IMC would have failed my Samsung binning, it needs +0.3 IOD for 2800+, unlike with PSC)

Edited by redux
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  • 9 months later...
Posted (edited)

Was just messing around the other day... 1400MHz CL6 tCWL7 2.15V at normal summer ambients :D

1.97V for 1300MHz CL6, so scaling is incredibly good, better than many sticks scale with CL8. Extrapolating the same scaling, maybe something like 1466MHz CL6 <2.3V could be done, though with how good this stick is I'm a little scared to see, haha

1400c6cw7air.thumb.jpg.18847a7ba3e6d1d0c7a241545d59388f.jpg

Edited by redux
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  • 2 months later...
Posted (edited)

I haven't gotten a video due to some issues with my OCF(s), but I thought I'd share some even better results than that, relying on archaic screenshot technology :P

I got a nice big lot of 2200C7 sticks a few weeks ago, and while most of them were pretty mediocre, as I expected, there were a few random, unmatched F3-17600CL7Q-8GBPIS that are very interesting. Two of the sticks are from the same separated kit, are both slightly better than that 2400C9 stick, though they're a bit weird...

For reference, the 2400C9 above does 1333MHz 8-12-8-30 1.77V. Obviously top tier stuff, but this pair of 2200C7 does even better, 1333MHz 8-12-8-30 1.76V and ...

inaLxXY.jpg

1333MHz 8-12-10-28 1.75V. Yes, it needs tRP10. This stick is a tragic but hilarious edge case, in that tCL voltage is extremely strong, but tRP voltage is pretty weak -- for reference 1200MHz tRP7 needs 1.87V, more like what you might find in some lowbin garbage, and tCL7 needs 1.59V, the best stick I own in this metric. Or, put another way, this is more voltage than is necessary for 1400MHz CL7/8!!!

Because of this stupid piece of shit stick I had to throw away everything I thought I knew about tRP and tRAS, and I spent weeks retesting and relearning my sticks.

That said, the tRP-normal 2200C7 has weird flaky behavior with high frequency CL8, and actually is more reliable with CL6... Actually, both sticks do 1400MHz CL6 2.15V like the 2400C9, but with tRDRD4! (This is significant because tRDRD5 completely changes voltage scaling, though that's a can of worms I'd rather not open.)

NEoLYkE.jpg

VQ49kth.jpg

I'm sure you can tell which stick is which :P

Edited by redux
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Posted

Not exactly wrong, but it's about confirming and quantifying things from older threads and results. A lot of things were just mentioned flatly and not explained in detail as to why they're important, so testing should be done for research purposes, even if it is a pain in the rear.

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Posted

It takes little time to read and then test but takes weeks to not read, test and then retest - that´s OK for me but if you do so, you should not complain :D - that´s the main point. On top, especially on PSC testing, board quality, imc quality and cooling used on the cpu influence results a lot. There are some general tests for quality like the 1200C7/1300C6 test which normally can be done even on cpu air cooling and on average imc unlike 1333+ results, but that trp weakness for example is a problem that hits psc often and can partially be leveled with voltage is no sorcery that needs big explanation, and it is well known and spread on lots of forums. Memory binning and testing is no rocket science, and if you have a good approach like redux here, I see no reason why you try to re invent the wheel when you have the information already at hand to make your life easier.

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Posted

IMHO there's really only one way to test PSC and that's LN2 as even good on air doesn't translate to good on LN2.

If you're not going to freeze your PSC then you might as well just use Samsung as it will 100% be faster ambient to ambient and there's no real need to try and test weird combinations (8-13-8, 8-12-10 etc. . .) that will still be slower than average Samsung.

Posted (edited)
3 hours ago, websmile said:

It takes little time to read and then test but takes weeks to not read, test and then retest - that´s OK for me but if you do so, you should not complain :D

Guilty as charged, my joke didn't quite land and I exaggerated a little. I don't really hate the stick, it did show me I had some incorrect ideas but 90% of my data was fine -- all the extra testing I did was just to learn. As for "reinventing the wheel," maybe I should explain what I'm doing.

 

My goal is to make it so that you don't have to read dozens of old forum threads to understand PSC properly. I talk to people all the time, even veteran benchers and binners, who don't seem to understand how it works. Sure, they can still take nice screens of 8-12-8 on air and 6-9-6 on cold, and separate good sticks from bad sticks, but they don't really understand. That's not to mention the DDR3 noobs I try to teach PSC in discord... Anyway, you could just say "read more" but I think there's a better way. I could have stopped binning a year ago, I have great sticks, but I'm trying to create the most thorough PSC guide ever. It's a bit more academic than practical tbh.

When I was first learning to bin DDR3 around 3 years ago, I read hundreds of pages of old threads on OCN and XS. To keep it short I will just say that the hardest part of learning from forums is that most people had no idea what they were doing, and the best binners had underlying ideas and assumptions that weren't always obviously said.

So, tRP is a good example: of course I saw many examples of tRP weakness -- I will never forget TaPaKaH's tRP-weak 2400C8 Pi -- but to be honest I don't think I ever saw anybody say "tRP scales with voltage." Maybe I read the "wrong" threads and didn't see it, but even the best PSC resource on the internet, DDR3 IC thread, doesn't say it:

Quote

How does it overclock:

[...]

tRP: Can usually run same value as CAS, but some kits might require it raised by one or two values. This will get worse as memory frequency increases.
tRAS: Base value would be 28 for 1200-1333MHz on air cooling. Might need to be further raised by two values each ~50MHz.

[...]

Binning criteria:

[...]
3) Capability of running tRP same as CL throughout the whole stable frequency range between 1100 and 1350MHz.

I agree with all of this, this is really great info, but when I first read this, I didn't know the underlying assumptions. I knew everybody ran 8-12-8 on good sticks; I didn't see screens of 1333MHz+ CL6 on air; and I assumed it means that "8-x-8 should work up to 1350MHz." I found lots of tRP weak sticks, but I also found a couple that had really steep MHz/V at high frequencies with 8-12-8-28 or 8-13-8-28; it was pretty uncommon so I thought they just hated high frequency. Similarly, most sticks do perfectly fine with keeping tRAS28 up to 1333MHz or even beyond, but some needed 30 at 1300MHz, and I found a pretty common trend of being able to run 7-30 instead of 8-28 at the same voltage on decent sticks, but 7-28 was much harder.

So my point is: my incorrect ideas worked 80-90% of the time, but to understand tRP and tRAS correctly you actually need to understand that tRP scales with voltage, tRP+tRAS=tRC which gives counterscaling between the timings (and which also scales with voltage), and how the tRP voltage curves compare to tCL voltage curves.

 

Anyway, I could go on, there are plenty of incorrect or unclear things in the conventional wisdom of PSC, but my point is that I'm not trying to reinvent the wheel, I'm trying to correctly understand the wheel :P. I have over 5000 data points on PSC across nearly 350 sticks, entirely unnecessary but I've learned a lot.

 

1 hour ago, l0ud_sil3nc3 said:

IMHO there's really only one way to test PSC and that's LN2 as even good on air doesn't translate to good on LN2.

If you're not going to freeze your PSC then you might as well just use Samsung as it will 100% be faster ambient to ambient and there's no real need to try and test weird combinations (8-13-8, 8-12-10 etc. . .) that will still be slower than average Samsung.

It's not practical, it's for fun and for science! :D

Edited by redux
three words
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Posted

Don´t get me wrong, but when I got my first two psc kits and tested these on chipset 1156 (I think was 2009 or so) I found them interesting but one behaved weird, after more testing I found my 2000C9 STT I had bought were not that stable with trp and cas even - so I tested this with cas7, 8 etc and finally after a few hours saw that trp was weaker than on my other psc kit. I tested this using memtest and found that you could, to a certain point, level this with raising volts. To end this, maybe I am not the right guy to discuss about science and psc because I see no science in this but only logical and methodical work. Like most other guys then we binned expensive stuff like psc for benching and tried to find the optimum so for example 1400c6 on air which was first doable with lucky imc on z97/87 was nonsense  for us when we saw it was slower than new 4gb sticks samsung d on air so you needed cold - that was tested a lot then^^

I really like the fact you support guys on discord and make psc a bit pouplar again 8 years after they lost relevance for top benching but you will have to go a very long way and maybe think about methology if you want to get the practical knowledge people had that tested these sticks on 10 different platforms, air cold and dice and so on. Enjoy binning

P.S. On this platform for example some guys shared results on all ICs, there may be around 5% of my tests I did, normally I think even less and only the ones relevant at their time. I hope this can support your search for results and data

https://www.hardwareluxx.de/community/threads/ddr4-ddr3-ddr2-superpi-32m-oc-liste-no-2.763367/

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Posted

It really depends on what you want to achieve with your PSC adventures.

The only practical use of PSC on contemporary platforms is on LN2 since Samsung is faster on air. So, if you want to remain practical, the only use of air binning is to filter out sticks that are garbage and to spot tRCD, tRP, tRDRD and other deficiencies that may also manifest on cold.

PSC is a funky IC that can produce numbers like 1400 CL6 and 1466 CL7 on air, so I guess there's also fun in testing that :)

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Posted
On 9/2/2022 at 10:22 PM, redux said:

And there's no reason to do this hobby if it's not fun :)

In any case LN2 is on the cards (Soon ™️) and everybody can be happy then haha

Benching PSC on air seems more like masochism than fun but hey to each their own :D

Show me the magic once you get those suckers cold! I think what you will find is that air testing is a moot point once going cold, just ask @TaPaKaH about his 2200 c9 BBSE's ;)

 

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  • 1 year later...
Posted
On 11/14/2023 at 9:18 AM, Splave said:

vince give you the sticks I gave him? XD

Out of curiosity, when and why did you give him those sticks? I want to know the story behind them. Here's what I know about them so far:

http://www.xtremesystems.org/forums/showthread.php?283666-Figuring-out-G-Skill-s-SNs&p=5169053&viewfull=1#post5169053

Pretty sure there's an older post about this kit somewhere, I'll dig for the link later. From what I recall, you had said they were rejects. Couldn't take voltage or hard to handle. That lines up with 06 and 07, which I sold, but I kept 08.

http://www.xtremesystems.org/forums/showthread.php?283666-Figuring-out-G-Skill-s-SNs&p=5169055&viewfull=1#post5169055

The bottom stich matches the heatspreader of the other stick I have.

https://www.facebook.com/photo?fbid=3720245261461&set=a.2305587735907

Given the OC properties, I'm guessing this is that other stick, too. Why did you flash it to Pi SPD at some point?

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