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Alex@ro

[GUIDE] Skylake Memory Timings on Asus Motherboards !

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Introduction

 

It’s been a while since Skylake launched and a whole new world opened for DDR4 tweaking . People posted various results and general guidelines are set however the most important things are still hidden for all world to see.

 

Some people might forget that getting some results it is sometimes only a matter of having a decent methodology and enough time at disposal and not being a genious, so this has to change as hidding subtimings and proclaiming the next Messiah on overclocking world will bring nothing but more people leaving and enjoy other hobbies more exciting compared to ours.

 

Ranting being spit off I will try to uncover and help some of you with various tips and maybe give you hints on how to gain the last bits of performance from your memory sets.

 

I’ve been playing with various Asus boards this generation so all tests were performed on these.

 

Memory Used:

  • Kingston 2666c15 Fury (Hynix Mfr)
  • Samsung D-die Gskill 3000 15-15-15 Ripjaws
  • Kingston A-die 3466 c16 (ES)
  • Samsung E-die Gskill 4000&4266 Trident-z .

 

Motherboards used:

  • Maximus VIII Gene & Impact ,also Extreme to confirm Gene results.

 

CPU : Intel I7-6700K retail,ambient water cooling.

 

Testing method : SuperPI 32M ran three loops at 4.00 GHZ and getting an average between them.

*Please note that this install of Windows Xp is not optimized for performing great in Low Clock Challenge,rather I tried to have a precise measurement tool as good as I could.For example running a D-C Wazza of 2000MB is yielding a difference of 0.100 and similar seconds for a few runs which is good enough in my book for seeing small performance gains.

 

So what is this all about?

You must had noticed that skylake had far more many options in UEFI for tuning ram.Now how this works it’s very hard to understand for a new user of this platform without either relying on build-in profiles or copying settings from other users.

 

 

Index

  • Issue #1: I can’t go over DDR4-3600 on Maximus 4-dimm boards
  • Issue #2: I am stuck at 55 41 78 or 3E POST CODE
  • Issue #3: General behavior of various IC
  • Issue #4: 2 DIMM vs 4 DIMM
  • Issue #5: BAD RTL Training
  • Issue #6: The TWRWR_DR and TWRWR_DR timings .
  • Issue #7: TWRRD_DR and TWRRD_DD
  • Issue #8: TWRRD_SG and TWRRD_DG
  • Issue #9: TRDRD_dr and TRDRD_dd
  • Issue #10: Proper Secondary Timings
  • Issue #11: The sweetspot….So where do we have the best performance ?
  • Issue #12: Samsung B-die Tuning

 

 

 

ISSUE #1: I can’t go over DDR4-3600 on Maximus 4-dimm boards

 

Encountered this while trying to bench Samsung D-die and E-die with tertiary on auto using Maximus VIII Gene and Extreme . The culprit to blame are TRDWR_sg TRDWR_dg and TRDWR_dr + TRDWR_dd . When going higher than 3600 these need to be set on same level as CAS value otherwise board will give you a nice 55 POST CODE to look at. This is not true for Impact because Impact cand handle lower values and higher speeds so it will have no problem booting 4133 on AUTO.

Websmile was first to notice so I give him credit for this.

4dimmboardq9ur2.jpg

 

 

ISSUE #2: I am stuck at 55 41 78 or 3E POST CODE

 

Encountered this a lot,usually:

  • 3E means too low Write Recovery / read to precharge time
  • 78 means too tight TRCD/TRP
  • 41 Means you went too tight on tertiary or you pushed too much voltage on Hynix MFR
  • 55 well this means a lot,from not enough voltage for give settings,too tight TRFC ,improper tertiary.

 

 

ISSUE #3: General behavior of various IC

 

Hynix MFR is the classic of X99 and actually the WORST performer on AIR . It has many problems on AIR,meaning hard to get high frequency and tight CAS . Worst voltage tolerant IC , creates many problems like you can pass DDR4-3200 12-15-15 at 1.58 V, 1.54V gives can’t train 55 and 1.62V gives you 41 because the voltage is too high . The best sticks to look for are the ones that support higher voltages at higher speeds , good sticks can bench DDR4-3200 12-15-15 under 1.6V and with good voltage tolerance they might get you to DDR4-3333 12 +

 

Hynix AFR is the improved die from Hynix . Fixes many of MFR flaws and it’s a huge improvement . Can tolerate high voltage at high speeds and run great on X99 and Z170 . They will be available very soon on Kingston HyperX memory and other vendors will implement too for sure.

 

Typical benching scenarios are

  • DDR4-3600 12-17-17 at 1.65
  • DDR4-3733 12-18-18 at 1.75
  • DDR4-3866 13-18-18 @1.85
  • DDR4-4000 13-19-19@1.94

 

Of course voltage might vary and be aware they are harder to clock compared to Samsung,my few sticks can’t manage over DDR4-3733 on any board but Impact ( 1 dimm per channel board)

 

Samsung D-Die K4A4G085WD

 

First die from Samsung has good voltage tolerance and can be found on a lots of modules from different vendors from Gskill 3000,3200 Ripjaws,early 3466 and 3600 Ripjaws-V and Trident-z to Corsair lineup and so on . Can go up to 2-2.1V on air and scaling is linear .

Typical benching scenarios are at DDR4-3733 15-19-19 for worser kits with 1.8-1.9V to better sticks doing even 13-18-18 .

 

Samsung E-DIE K4A4G085WE

 

Second revision from Samsung gained huge improvements . Voltage tolerance is great,taking up to 2.1V at 4200+ speeds ,trcd limits have gone lower and overall it looks like a very solid IC.

Typical benching scenarios are:

  • DDR4-3600 11-17-17 at 1.9V and under
  • DDR4-3866 11-19-19 at 2.05V and under
  • DDR4 -4000 12-20-20 at 2V and under

 

So far to be found on G.skill Trident-Z and Ripjaws-V kits on week 38 and higher , Teamgroup inferior bin of 3866 18-22-22 and newly Corsair 4000c19 .

The best modules to aim for are low TRCD ones, generally aim for DDR4-3600 TRCD/TRP 17 and DDR4-4000 TRCD/TRP 19 . They are the easiest to clock modules and also can go lower in tertiary/secondary ,TRFC of 280 at 4200 speed should not be a problem for good sticks.

 

 

ISSUE #4: 2 DIMM vs 4 DIMM

 

4 DIMM is ALWAYS faster than 2 DIMM at similar clocks/timings . Early results in XTU benchmark showed that , however this puts more stress on IMC and result in looser timings sometimes. The only timing to be adjusted is TWRWR_DD which has to be 8 otherwise platform will not start.

Keeping identical secondary/tert timings at same clock speed on 4 ghz 32M test this is about 1 second faster at DDR4-3466 C12 which is quite a difference in 32M world.

 

3466c12c1zlv.png

3466c1216gb2l1spa.png

 

Please NOTE that AUTO RTL/IOL on 4 DIMM scanarios will give you very loose IOL,this is because Maximus boards will automatically set IOL_latency offset 15 instead of default 21 when 2 dimms are used. Easy way to fix this is to manually set 21 for better performance.

4dimmrtlcooti.jpg

 

 

ISSUE #5: BAD RTL Training

 

Sometimes the memory training is missed and you can see big difference in RTL/IO,for example instead of 50/51/7/6 you will have 58/51/14/6 and similar.This WILL hurt the performance a lot in 32M and XTU too,It is always best when finding proper RTL/IOL combo to manually lock them by overriding AUTO so you will have same values every time.

 

Example : Samsung D 3733 C14 normal RTL vs fail RTL :

samsung3733trdrddrdr0z9urp.png

rtlmisssdune.png

 

 

ISSUE #6: The TWRWR_DR and TWRWR_DR timings .

 

Being advocated to go as low as it can this is actually a big lie as tested on all ic available I had found that going lower actually hurts and optimum value for high and medium speeds is actually 8 .

Tested on MFR,Samsung E-die and Kingston AFR,4 4 is worser than 8 8 period .

AFR DDR4-3866 13-18-18

TWRWR_DR TWRWR_DD 8 8

3866afr1318trdrd009vsch.png

TWRWR_DR TWRWR DD 4 4

3866afr1318twrwr4failqys3c.png

0.400 Sec Worse

E-DIE DDR4-4133 12-20-20 TWRWR_DR TWRWR_DD 8 8

4133122020twrwr8z9sm1.png

TWRWR_DR TWRWR DD 4 4

41331220twrwr4369slg.png

0.300 Sec Worse

Hynix MFR DDR4-3200 12-15-15 TWRWR_DR TWRWR_DD 9 9 same as 8 8 result

mfr320035ml8a.png

TWRWR_DR TWRWR_DD 4 4

mfrtwrwr41mgxet.png

 

1 SECOND Difference at slower times !

 

 

ISSUE #7: TWRRD_DR and TWRRD_DD

 

Actually encountered this issue when I left this timing on AUTO and went from DDR4 3466 C12 to C11 and got a worser score !. After a few tries I found that AUTO gave me 6 6 and after lowering this to 5-5 performance gain was normal . It actually can go lower to 4 4 and 3 3 but performance was similar to 5-5 on Hynix AFR and worser on Samsung E-die and stability was a little bit worse so I would recommend 5-5 in all cases period.

 

Example:

 

Hynix AFR DDR4-3466 C12 Twrrd_dr , dd at 5 5 : 7 26 110

3466c121j3s9z.png

DDR4-3466 C11 TWRRD_dr dd at 6 6 7 26 281

3466c113failtjskj.png

DDR4-3466 C11 TWRRD_dr dd at 5 5 : 7 m 25 672

3466c1115xjlv.png

Samsung E-die 4133 12-20-20 TWRRD_dr dd 4 4 : 7.23.719

4133122020twrwr42l3sk6.png

Samsung E-die 4133 12-20-20 TWRRD_dr dd 5 5 : 7.23.562

413312201r4k3q.png

 

 

ISSUE #8: TWRRD_SG and TWRRD_DG

 

General rule is that they go tighter with CAS going lower and they are linked with Write to Read Delay L and S . Write to Read Delay L and S can go lower than 6 even to 1 but show no performance increase whatsoever,except when lowering them by TWRRD_SG and TWRRD_DG.

 

link9tst6.jpg

 

For example the settings pictured above resulted in showing 7 7 for write to read delay L and S although they were set at 6 in UEFI .

 

3866afr1318trdrd56bcksr.png

 

Lowering TWRRD_DG from 22 to 18 resulted in showing 7 and 3 :

 

snaphsot0011pash4.png

 

The performance boost is little but might matter on

 

Since we are talking about Write to Read Delay(not L and S), this timing can go as low as 1 and see little performance boost

 

 

ISSUE #9: TRDRD_dr and TRDRD_dd

 

This is actually interesting because of conflicting results.While testing IC from Hynix and Samsung I noticed that Hynix prefers this two timings at 0 0 gaining almost half a second boost while Samsung prefers the other way around having the best results at 5 6 .Even complementary values like 4-5 5-5 6-7 gave worser results so my findings are that if you own a Samsung based memory this have to be set at 5-6 while Hynix likes them at 0-0.

 

Example :

 

Samsung D-Die 3733 14-19-19

TRDRD_dr + dd 0-0  7.26.172

samsung3733trdrddrdr0s1usn.png

TRDRD_dr+dd 4-5  7.26.000

samsung3733trdrddrdd4dflx1.png

TRDRD_dr+dd 5-6  7.25.844

samsungd3733c14trdrdscvroz.png

Hynix AFR 3866 13-18-18

TRDRD_dr+ dd 5-6  7.24.172

3866afr1318trdrd56vfuup.png

TRDRD_dr+dd 0-0  7.23.969

3866afr1318trdrd007ouzt.png

 

 

ISSUE #10: Proper Secondary Timings

 

I’ve found no problem lowering these timings to these values on all IC and getting better performance than default profiles will give .Also they are GTG to 4200+ speeds .

Therefore:

  • Refresh Cycle Time (TRFC) can go as low as 270 for E-die on even 4200+ speeds,AFR needs this at 340+ when going over 3800,D-die also needs it higher than E-die and needs to be tested on your kit. Performance boost is minimal but would not hurt for mental comfort to get it as low as you can.
  • tREFI set to max(65535) gives slight better performance and does not hurt stability therefore no problems here.
  • Read to Precharge (TRTP) + Write Recovery Time (TWR) this comes as pack since you can’t adjust one independent from the other,can set to lowest 6 and 12 which will actually be reported as 13 in timing reader ,performance boost is decent actually .
  • Four Activate Window (tFAW) Usually setting this as 16 gained little performance,can go lower actually but not found any benefit at all so u should try also in your case.
  • RAS TO RAS DELAY (L and S) Typical values of 7 5,you can get them lower at lower speeds and also when using tight CL like C11 at higher speeds by lowering TRDWR_SG and DG.
  • WRITE TO READ DELAY (L AND S) As explained before the values shown are connected to TWRRD_sg and dg . Hynix does not like them set in bios lower than 6 opposed to Samsung which can go to 1 but performance is identical so nothing to gain here except lower them with the help of Twrrd_sg and dg .Too tight might cause problems so try to start with 7 7 and after reaching given speed try lower.
  • WRITE TO READ DELAY Can go usually to 1 from default 6 or 7 ,performance gain is small but can be seen .
  • CAS WRITE LATENCY Can be set as low as 8 however the benefit in my tests was 0 compared to 9 . When going lower can help you tighten the TWRRD_sg and dg ..

 

ISSUE #11: The sweetspot….So where do we have the best performance ?

 

Actually TRCD/TRP do matter in terms of 32M and bandwith tests like Aida64,will also help you gain few points in XTU also . Hynix IC set on cold will help you lower this values to 16-17 at speeds of 3800+ which coupled with C11 and tight subs/tertiary will give you nice performance. On air it is no contest when doing lower CAS,proper Samsung E-die can go as high as 4133 C11+ but the wicked TRCD/TRP cannot go as low as Hynix .

Bottom line is the sweetspot seems to be around 3900~4000 . I benched at 4240 too with the same secondary/tertiary as 3960 for example but ofcourse higher TRCD and the performance is worse,this might be the case where the bandwith is already enough just tighter timings need to filled in.

For example DDR4-4133 12-20-20 is marginally faster compared to DDR4-4000 12-20-20 at identical tertiary/rtl however DDR4-3960 12-19-19 is faster than both .Also 3866 13-18-18 can be close enough to conclude that TRCD/TRP still have important role in 32M so they need to be taken into consideration.

 

 

DDR4-3866 13-18-18 Tightest and most efficient for HYNIX AFR :

 

 

3866afr1318twritetoreosue8.png

 

 

DDR4-4000 12-20-20 Tightest and most effcient set of timings for samsung e-die:

 

40001220bestomua7.png

 

DDR4-3960 12-19-19 Best overall performance :

 

396012-19-19w5k57.png

 

I also made a small graph with the best performance from all IC and some more combo’s I tried .

 

graph2ps0h.png

 

ISSUE #12: Samsung B-die Tuning

 

Since this guide was originally posted before Samsung B-die made an entrance in them market,I decided to add my experiences with it later on the path.

B-die a.k.a K4A8G085WB started manufacturing middle of 2015 with the first IC carrying week 524 code on Samsung OEM and 528 on 3-rd party vendors(according to my own research) .

It shares a lot with previous E-die in voltage/mhz/tcl scaling while also allowing ridiculous low TRCD-TRP limits which simply makes it the best choice in overclockers arsenal .

At the moment 70% or more of the market B-die seems to be manufactured at the same factory with the same 10-layer pcb as you can see in following picture , Teamgroup , Zadak511 and G.skill sharing same PCB together with Galax and possible others too.

 

b-diepcblyupo.jpg

 

As good as it is for benching ,this Particular IC has it’s flaws also .Those seem to be :

-Voltage tolerance

-copy-wazza issue

Regarding voltage tolerance B-die seems to be less permissive than E-die,with a lot of sticks getting issues at 1.95V and over .

Considering B-die voltage scaling is like 0.1V per each 133 mhz at TCL12(e.g DDR4-3733 12 12 12 required 1.67,DDR4-3866 requires 1.77,DDR4-4000 requires 1.87 on same stick) it is clear that the goal is to find sticks that are decently in voltage requirement at DDR4-4000 (under 1.95V) but tolerating 2.05 .Please note that voltage tolerance does not improve with cold or different cpu or motherboard.

Copy-wazza issue was discovered and currently seems to be the flaw of many sticks . The flaw it’s simple, module will run every benchmark at a given frequency and timings except S-pi 32M with copy-wazza tweak which required 200-300 mhz less for benchmarking. Based again on my own research it seems that the flaw is related to B-die production weeks and my testing showed that:

-sticks 534-540 including 540 will pass most of the times wazza ;

-543 has a 50% chance of passing wazza;

-545 549 552 will fail most of the times ;

-601-616 has a decent chance of passing wazza;

-619 will pass most of the times wazza (80%+ in my testing)

4-dimm motherboards will have a hard time running B-die over 3866 and if your goal is to reach DDR4-4000 12 12 12 on these motherboards ,serious binning of the motherboard is required.

Therefore almost all of my testing was performed on Maximus VIII Impact which can handle way better the 8GB sticks.

Similar to E-die , Samsung B-die allows very tight tertiary and secondary timings,compared to previous generation trfc can actually go very low like 180 at 4000+ without however any significant performance improvements in SuperPi. A value of 240 should be good match for stability and performance as some sticks can have problems regarding 200 or lower at 4000+.

The following combo should not limit overclocking or performance :

 

 

 

snaphsot0007lskz9.png

 

 

 

Please note in rare cases some sticks may not like Write Recovery time and TRTP,therefore don’t forget to try relaxing this as last resort.

An important note also is that tertiary TWRWR_dr and _dd actually benefit from values like 4-4 or 5-5 on Asus Maximus motherboards compared to rest of the IC’s tested.

Maximus VIII Impact can handle very tight RTL at 4000+,typical values are 49-50-6-6,50-50-7-6,50-51-7-7,51-51-8-7.

 

 

160920223159xgsgz.png

 

 

These advanced SLOPES settings may give you a little boost in improving stability and MHZ:

 

 

160920223220xksgs.png

 

For my particular IMC/Motherboard combination the outcome at 4133 12-11-11 timings was the following:

-ALL AUTO loop 14-15 would crash;

-ALL SET 15-1 Initial round failed;

-ALL FALLING SLOPES 15-1 ,rest auto would fail to load windows;

-ALL RISING SLOPES 15-1 ,rest auto would pass loop after loop with wazza.

Also note that increasing slopes value will give VCCIO a better scaling.

 

DEBUGGING B-DIE

So you got yourself one or more B-die sets for benching and you want to check the potential on your Maximus VIII Impact. You might want to check on the following issues.

1. Eternal boot of the spotless B-die

Some sticks exhibit this issue even at DDR4-3733 12-12-12 ,they will need over 1 minute to start OS loading.However most of the sticks would manifest this when going over 4000 12-11-11 . This behavious will be manifested on other brands of motherboard so it is not specific to Maximus VIII series.

You will first notice a long wait at 79 code then another long wait at b4 ,culminating with another long wait at 99 then finally pushing into a weird error code regarding Mei before finally entering OS.

 

 

20160920_150522s1uii.jpg

 

 

20160920_150534dwum7.jpg

 

 

20160920_15040601ur9.jpg

 

 

20160920_150634c5up7.jpg

 

Also this is related to not being able to shutdown or restart from OS being stuck at 04 ore 05 code .

As weird as this may sound, a stick that had this behavior at 3733 12-12-12 could pass DDR4-4080 12-11-11 with copy-wazza so on current platforms there is no connection between this behavior and benching potential.

Cooling the memory to -50 or lower got me rid of this behavior but overclocking potential did not get better sadly.

 

2. Voltage tolerance behavior

4F is the debug code on B-die for expressing that you passed the voltage tolerance limit on your sticks.

 

For example on most of the sticks I could bench relative stable 0.03-0.04 under this limit . When you reach the “Danger Zone†the stick will let you know it is not confortable by either getting weird blue-screens or by receiving “NOT CONVERGENT IN SQRT†error in SuperPI 32M.

3. Different behaviours under stress

- NOT CONVERGENT IN SQRT while running 32M,either problem with voltage tolerance or TRCD too tight

-exit benchmark while running 32M, either too tight RTL or too low VCCIO, 1.35V and -100 will definatly maxxx-out your IMC potential.

-errors in DJIKSTRA test of Geekbench , try lower-higher voltage than 32M .

-XTU errors . In my case XTU required higher TRFC for complete stability than 32M,however XTU also benefits lower trfc to 200-220 so the only way of having complete stability for bugging the ultimate score was cooling mems to 0-10 degrees.

 

Have fun and remember that maximizing your results depends on your sticks , board and IMC .

 

 

Bottom Line

 

Bottom line is Skylake is for sure a very interesting platform and the thing that DDR4 is still in early time makes it even more interesting . I made this tests for helping some people who are eager to fine-tune their ram on Asus platforms but lack the time needed for this .I think my findings should be repeatable on other motherboards however this needs to be tested for sure. I tried to make this as accurate as I could , I had to repeat tests after changing different parameters again and so on,also having no official guidelines made this search more difficult.

Edited by Alex@ro
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Excelent work, lots of time invested, very methodical - this will help a lot of people and you can´t get enough credit for this :)

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Good job, a lot of interesting information, multiple tests, it will definitely make tweaking DDR4 a lot easier.

For me, a thread of the year! Thanks Alex! :)

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Guest barbonenet

Nice bro, but why do you show a so low efficiency??? What is it wrong???

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OS ,sp3 windows xp with not all services disabled,no ram drive,etc.Purpose was to have a valid measurement tool and getting consistent results run after run after restart,etc . Will do a few more tests on this OS then aim for 32M efficiency on other one .

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Guest barbonenet

i13053_efficiency.jpg

questo a 3200 12-15-15-28 1T e XP Taiwan non e' il massimo su Z170.....domani provo con Asus e XP EN :)

 

wtf sorry i've written in italian...oh my god i'm ko:D

 

this is at 3200 12-15-15-28 1T on XP Tw....but Tw on Z170 isnt very good.

tomorrow i will try with Asus and XP EN.....

Edited by barbonenet

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hey man good effort but I dont think an unwazzaed pi run alone is good indicator of performance. I can go up and down a full second running back to back also without wazza who knows if you sat in windows for 5 minutes before you ran etc will affect it.

 

you can see when comparing some things that your ARM is lower and your result is slower VS two different timing sets.

 

maybe try wazzaed runs for more consistency of the result or add XTU / Aida as well.

 

@ hiding third timings, why give away all hard work man? you obviously spend alot of time on mems. Giving away the goose is not going to make more people want to overclock. You see a guy like barbonet or bullant learning by doing is the people we want in OC not more people that want a hand out and will use your timings for a little while then quit. We want the passion of learning to generate our populous here. Thats why I have no issue keeping your cards close to the chest on that matter. In your own experience did you just copy peoples subtimings or did you try them all and find which helps performance etc which has lead you to where you are?

 

 

This is tricky testing only on ASUS as well as we all know the design is different is also affecting the efficiency of these boards which is why they need 4 dimms to be installed to keep up with 2 dimms on ASRock.

 

I know for a fact tWRWR_DR tWRWR_DD on ASRock lower is better, its one of the biggest secrets at launch for its efficiency. When anyone PMs me for XTU help on ASRock that is what I tell them and 100% all of them have come back and said WOW what a huge difference.

 

good effort

Edited by Splave

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Yes,the tests consisted in running multiple runs of 32M with WAZZA ,not without :) It took a long time also because i had to verify the findings when modifying other timings as well,see for example twrwr_dr dd ,tried with a set of tertiary,modified them and tried again to compare to see if anything changed . It is tricky also with different IC liking different approach ...

 

Things are simple when given for free,however hiding stuff will not make it encouraging . I can tell for example any user who just pluggs his new highly binned kit , loads a profile,plays a little and hits a nice 55 code,tries again for a half an hour and no solution . What is he going to do?Most likely load X.M.P and move away to better things .

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Things are simple when given for free,however hiding stuff will not make it encouraging . I can tell for example any user who just pluggs his new highly binned kit , loads a profile,plays a little and hits a nice 55 code,tries again for a half an hour and no solution . What is he going to do?Most likely load X.M.P and move away to better things .

 

Give a man a fish he eats for a day right ;)

 

Just differing opinions is okay

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Guest george.kokovinis

My apologies to all for showing up in a ball game of top notch benchers worldwide.

I am one of the thousands that read such articles with a feeling of eternal gratitude to the man/men behind these efforts.

My humble opinion in general is that so much work and the will to share the findings, is worth a HUGE THANK YOU.

I am in no position to judge the results.

I do not have the knowledge.

 

What I can do is admire Alex and every Alex in life that shares knowledge.

 

So, thank you Alex, thank you Splave and anyone else that shares his lights with us, amateur benchers, who simply try to have some fun.

 

A huge shout goes out from me to Michael ( Websmile ). who has been more than helpful on many occasions. He is a very decent and kind person in my book.

 

Thank you all.

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Bullant when did you grow this ego? Your embarassing yourself again bro

 

Alex is up here putting in work and your putting it down, srslybro

 

Ill say this again, winning a low clock challenge once doesn't mean bunnyextraction dude, its a bunnying lcc, for all we know you down clock for screen. Nothing else youve ever done would indicate you are a good bencher.

 

Ill make a suggestion, do something good or shelf the ego and stfu man

 

Have a good day and thanks Alex for your efforts

 

 

I don't think he should be put down for correcting errors. I understand you two have beef so naturally you see the opportunity to go after him and that's fine if you want to I'm not your dad I won't tell you what to do.

 

Hard work went into this for sure and intentions are good but the dig in the opening lines are worth speaking as to why we do this.

 

 

The pi times are very poor so to tell us what we need to do to be efficient seems off. Just going by experience not to be a dick but I'd rather be told honest truths from my peers then be patted on the head

Edited by Splave

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Guest barbonenet

Yeah...alot of job here....but it needs efficiency......because work hours and hours on ddr to get a so slow efficency is very unsatisfactory...that's it!

Keep pushing Alex;)

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Whoa! What happened in here! One of the best threads in ages and weather you agree or not with the Alex's findings i fully appreceiate what he has done here, wish more would follow suit!

Makes me wonder how the new pro oc cup comp thing is gonna work where writting guides is part of the package!

Basically agree with george here, so thanks Alex and to all the rest that go out of there way to share a little infomation, thank you ;)

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First of all: thanks for the info Alex! I look forward to seeing to follow up with focus on Pi and XTU efficiency.

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